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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2006-03-16 09:44:36 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-03-21 17:03:25 -0500
commit74945c8616a50074277e18641baaae7464006766 (patch)
treeb74a005fd0c38b2582783378321bf324545f3346 /include/asm-arm/pgtable.h
parent0f44ba1d1e67201c0c58af26eb441fa7014c89ec (diff)
[ARM] nommu: Move hardware page table definitions to pgtable-hwdef.h
Move the hardware PMD and PTE page table definitions from pgtable.h into pgtable-hwdef.h, and include pgtable-hwdef.h as necessary. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/pgtable.h')
-rw-r--r--include/asm-arm/pgtable.h80
1 files changed, 0 insertions, 80 deletions
diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h
index 70e00d08345e..e595ae24efe2 100644
--- a/include/asm-arm/pgtable.h
+++ b/include/asm-arm/pgtable.h
@@ -137,81 +137,6 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
137#define SUPERSECTION_MASK (~(SUPERSECTION_SIZE-1)) 137#define SUPERSECTION_MASK (~(SUPERSECTION_SIZE-1))
138 138
139/* 139/*
140 * Hardware page table definitions.
141 *
142 * + Level 1 descriptor (PMD)
143 * - common
144 */
145#define PMD_TYPE_MASK (3 << 0)
146#define PMD_TYPE_FAULT (0 << 0)
147#define PMD_TYPE_TABLE (1 << 0)
148#define PMD_TYPE_SECT (2 << 0)
149#define PMD_BIT4 (1 << 4)
150#define PMD_DOMAIN(x) ((x) << 5)
151#define PMD_PROTECTION (1 << 9) /* v5 */
152/*
153 * - section
154 */
155#define PMD_SECT_BUFFERABLE (1 << 2)
156#define PMD_SECT_CACHEABLE (1 << 3)
157#define PMD_SECT_AP_WRITE (1 << 10)
158#define PMD_SECT_AP_READ (1 << 11)
159#define PMD_SECT_TEX(x) ((x) << 12) /* v5 */
160#define PMD_SECT_APX (1 << 15) /* v6 */
161#define PMD_SECT_S (1 << 16) /* v6 */
162#define PMD_SECT_nG (1 << 17) /* v6 */
163#define PMD_SECT_SUPER (1 << 18) /* v6 */
164
165#define PMD_SECT_UNCACHED (0)
166#define PMD_SECT_BUFFERED (PMD_SECT_BUFFERABLE)
167#define PMD_SECT_WT (PMD_SECT_CACHEABLE)
168#define PMD_SECT_WB (PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)
169#define PMD_SECT_MINICACHE (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE)
170#define PMD_SECT_WBWA (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)
171#define PMD_SECT_NONSHARED_DEV (PMD_SECT_TEX(2))
172
173/*
174 * - coarse table (not used)
175 */
176
177/*
178 * + Level 2 descriptor (PTE)
179 * - common
180 */
181#define PTE_TYPE_MASK (3 << 0)
182#define PTE_TYPE_FAULT (0 << 0)
183#define PTE_TYPE_LARGE (1 << 0)
184#define PTE_TYPE_SMALL (2 << 0)
185#define PTE_TYPE_EXT (3 << 0) /* v5 */
186#define PTE_BUFFERABLE (1 << 2)
187#define PTE_CACHEABLE (1 << 3)
188
189/*
190 * - extended small page/tiny page
191 */
192#define PTE_EXT_XN (1 << 0) /* v6 */
193#define PTE_EXT_AP_MASK (3 << 4)
194#define PTE_EXT_AP0 (1 << 4)
195#define PTE_EXT_AP1 (2 << 4)
196#define PTE_EXT_AP_UNO_SRO (0 << 4)
197#define PTE_EXT_AP_UNO_SRW (PTE_EXT_AP0)
198#define PTE_EXT_AP_URO_SRW (PTE_EXT_AP1)
199#define PTE_EXT_AP_URW_SRW (PTE_EXT_AP1|PTE_EXT_AP0)
200#define PTE_EXT_TEX(x) ((x) << 6) /* v5 */
201#define PTE_EXT_APX (1 << 9) /* v6 */
202#define PTE_EXT_SHARED (1 << 10) /* v6 */
203#define PTE_EXT_NG (1 << 11) /* v6 */
204
205/*
206 * - small page
207 */
208#define PTE_SMALL_AP_MASK (0xff << 4)
209#define PTE_SMALL_AP_UNO_SRO (0x00 << 4)
210#define PTE_SMALL_AP_UNO_SRW (0x55 << 4)
211#define PTE_SMALL_AP_URO_SRW (0xaa << 4)
212#define PTE_SMALL_AP_URW_SRW (0xff << 4)
213
214/*
215 * "Linux" PTE definitions. 140 * "Linux" PTE definitions.
216 * 141 *
217 * We keep two sets of PTEs - the hardware and the linux version. 142 * We keep two sets of PTEs - the hardware and the linux version.
@@ -236,11 +161,6 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
236 161
237#ifndef __ASSEMBLY__ 162#ifndef __ASSEMBLY__
238 163
239#include <asm/domain.h>
240
241#define _PAGE_USER_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER))
242#define _PAGE_KERNEL_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_KERNEL))
243
244/* 164/*
245 * The following macros handle the cache and bufferable bits... 165 * The following macros handle the cache and bufferable bits...
246 */ 166 */