[ARM] Add ARM irqtrace support

This adds support for irqtrace for lockdep on ARM.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 132 insertions, 0 deletions

diff --git a/include/asm-arm/irqflags.h b/include/asm-arm/irqflags.h
new file mode 100644
index 000000000000..6d09974e6646
--- /dev/null
+++ b/include/asm-arm/irqflags.h
@@ -0,0 +1,132 @@
+#ifndef __ASM_ARM_IRQFLAGS_H
+#define __ASM_ARM_IRQFLAGS_H
+
+#ifdef __KERNEL__
+
+#include <asm/ptrace.h>
+
+/*
+ * CPU interrupt mask handling.
+ */
+#if __LINUX_ARM_ARCH__ >= 6
+
+#define raw_local_irq_save(x)                                   \
+        ({                                                      \
+        __asm__ __volatile__(                                   \
+        "mrs    %0, cpsr                @ local_irq_save\n"     \
+        "cpsid  i"                                              \
+        : "=r" (x) : : "memory", "cc");                         \
+        })
+
+#define raw_local_irq_enable()  __asm__("cpsie i        @ __sti" : : : "memory", "cc")
+#define raw_local_irq_disable() __asm__("cpsid i        @ __cli" : : : "memory", "cc")
+#define local_fiq_enable()  __asm__("cpsie f    @ __stf" : : : "memory", "cc")
+#define local_fiq_disable() __asm__("cpsid f    @ __clf" : : : "memory", "cc")
+
+#else
+
+/*
+ * Save the current interrupt enable state & disable IRQs
+ */
+#define raw_local_irq_save(x)                                   \
+        ({                                                      \
+                unsigned long temp;                             \
+                (void) (&temp == &x);                           \
+        __asm__ __volatile__(                                   \
+        "mrs    %0, cpsr                @ local_irq_save\n"     \
+"       orr     %1, %0, #128\n"                                 \
+"       msr     cpsr_c, %1"                                     \
+        : "=r" (x), "=r" (temp)                                 \
+        :                                                       \
+        : "memory", "cc");                                      \
+        })
+        
+/*
+ * Enable IRQs
+ */
+#define raw_local_irq_enable()                                  \
+        ({                                                      \
+                unsigned long temp;                             \
+        __asm__ __volatile__(                                   \
+        "mrs    %0, cpsr                @ local_irq_enable\n"   \
+"       bic     %0, %0, #128\n"                                 \
+"       msr     cpsr_c, %0"                                     \
+        : "=r" (temp)                                           \
+        :                                                       \
+        : "memory", "cc");                                      \
+        })
+
+/*
+ * Disable IRQs
+ */
+#define raw_local_irq_disable()                                 \
+        ({                                                      \
+                unsigned long temp;                             \
+        __asm__ __volatile__(                                   \
+        "mrs    %0, cpsr                @ local_irq_disable\n"  \
+"       orr     %0, %0, #128\n"                                 \
+"       msr     cpsr_c, %0"                                     \
+        : "=r" (temp)                                           \
+        :                                                       \
+        : "memory", "cc");                                      \
+        })
+
+/*
+ * Enable FIQs
+ */
+#define local_fiq_enable()                                      \
+        ({                                                      \
+                unsigned long temp;                             \
+        __asm__ __volatile__(                                   \
+        "mrs    %0, cpsr                @ stf\n"                \
+"       bic     %0, %0, #64\n"                                  \
+"       msr     cpsr_c, %0"                                     \
+        : "=r" (temp)                                           \
+        :                                                       \
+        : "memory", "cc");                                      \
+        })
+
+/*
+ * Disable FIQs
+ */
+#define local_fiq_disable()                                     \
+        ({                                                      \
+                unsigned long temp;                             \
+        __asm__ __volatile__(                                   \
+        "mrs    %0, cpsr                @ clf\n"                \
+"       orr     %0, %0, #64\n"                                  \
+"       msr     cpsr_c, %0"                                     \
+        : "=r" (temp)                                           \
+        :                                                       \
+        : "memory", "cc");                                      \
+        })
+
+#endif
+
+/*
+ * Save the current interrupt enable state.
+ */
+#define raw_local_save_flags(x)                                 \
+        ({                                                      \
+        __asm__ __volatile__(                                   \
+        "mrs    %0, cpsr                @ local_save_flags"     \
+        : "=r" (x) : : "memory", "cc");                         \
+        })
+
+/*
+ * restore saved IRQ & FIQ state
+ */
+#define raw_local_irq_restore(x)                                \
+        __asm__ __volatile__(                                   \
+        "msr    cpsr_c, %0              @ local_irq_restore\n"  \
+        :                                                       \
+        : "r" (x)                                               \
+        : "memory", "cc")
+
+#define raw_irqs_disabled_flags(flags)  \
+({                                      \
+        (int)((flags) & PSR_I_BIT);     \
+})
+
+#endif
+#endif