diff options
author | Lennert Buytenhek <buytenh@wantstofly.org> | 2006-09-18 18:16:23 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-09-25 05:25:39 -0400 |
commit | 0cb015f9dea8a40d82d170be1a4f39ff909890bf (patch) | |
tree | 5621ee188d4a48dc8f412370a8153503f0dd545e /include/asm-arm/hardware | |
parent | e25d64f1242e8586f6e20c26fd876a4d956a6c45 (diff) |
[ARM] 3820/1: iop3xx: factor out shared pci code
Merge the iop32x PCI code and iop33x PCI code into plat-iop/pci.c.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/hardware')
-rw-r--r-- | include/asm-arm/hardware/iop3xx.h | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/include/asm-arm/hardware/iop3xx.h b/include/asm-arm/hardware/iop3xx.h index ea7d05970001..d488ced2e12d 100644 --- a/include/asm-arm/hardware/iop3xx.h +++ b/include/asm-arm/hardware/iop3xx.h | |||
@@ -23,6 +23,64 @@ | |||
23 | #define IOP3XX_PERIPHERAL_SIZE 0x00002000 | 23 | #define IOP3XX_PERIPHERAL_SIZE 0x00002000 |
24 | #define IOP3XX_REG_ADDR(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + (reg)) | 24 | #define IOP3XX_REG_ADDR(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + (reg)) |
25 | 25 | ||
26 | /* Address Translation Unit */ | ||
27 | #define IOP3XX_ATUVID (volatile u16 *)IOP3XX_REG_ADDR(0x0100) | ||
28 | #define IOP3XX_ATUDID (volatile u16 *)IOP3XX_REG_ADDR(0x0102) | ||
29 | #define IOP3XX_ATUCMD (volatile u16 *)IOP3XX_REG_ADDR(0x0104) | ||
30 | #define IOP3XX_ATUSR (volatile u16 *)IOP3XX_REG_ADDR(0x0106) | ||
31 | #define IOP3XX_ATURID (volatile u8 *)IOP3XX_REG_ADDR(0x0108) | ||
32 | #define IOP3XX_ATUCCR (volatile u32 *)IOP3XX_REG_ADDR(0x0109) | ||
33 | #define IOP3XX_ATUCLSR (volatile u8 *)IOP3XX_REG_ADDR(0x010c) | ||
34 | #define IOP3XX_ATULT (volatile u8 *)IOP3XX_REG_ADDR(0x010d) | ||
35 | #define IOP3XX_ATUHTR (volatile u8 *)IOP3XX_REG_ADDR(0x010e) | ||
36 | #define IOP3XX_ATUBIST (volatile u8 *)IOP3XX_REG_ADDR(0x010f) | ||
37 | #define IOP3XX_IABAR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0110) | ||
38 | #define IOP3XX_IAUBAR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0114) | ||
39 | #define IOP3XX_IABAR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0118) | ||
40 | #define IOP3XX_IAUBAR1 (volatile u32 *)IOP3XX_REG_ADDR(0x011c) | ||
41 | #define IOP3XX_IABAR2 (volatile u32 *)IOP3XX_REG_ADDR(0x0120) | ||
42 | #define IOP3XX_IAUBAR2 (volatile u32 *)IOP3XX_REG_ADDR(0x0124) | ||
43 | #define IOP3XX_ASVIR (volatile u16 *)IOP3XX_REG_ADDR(0x012c) | ||
44 | #define IOP3XX_ASIR (volatile u16 *)IOP3XX_REG_ADDR(0x012e) | ||
45 | #define IOP3XX_ERBAR (volatile u32 *)IOP3XX_REG_ADDR(0x0130) | ||
46 | #define IOP3XX_ATUILR (volatile u8 *)IOP3XX_REG_ADDR(0x013c) | ||
47 | #define IOP3XX_ATUIPR (volatile u8 *)IOP3XX_REG_ADDR(0x013d) | ||
48 | #define IOP3XX_ATUMGNT (volatile u8 *)IOP3XX_REG_ADDR(0x013e) | ||
49 | #define IOP3XX_ATUMLAT (volatile u8 *)IOP3XX_REG_ADDR(0x013f) | ||
50 | #define IOP3XX_IALR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0140) | ||
51 | #define IOP3XX_IATVR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0144) | ||
52 | #define IOP3XX_ERLR (volatile u32 *)IOP3XX_REG_ADDR(0x0148) | ||
53 | #define IOP3XX_ERTVR (volatile u32 *)IOP3XX_REG_ADDR(0x014c) | ||
54 | #define IOP3XX_IALR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0150) | ||
55 | #define IOP3XX_IALR2 (volatile u32 *)IOP3XX_REG_ADDR(0x0154) | ||
56 | #define IOP3XX_IATVR2 (volatile u32 *)IOP3XX_REG_ADDR(0x0158) | ||
57 | #define IOP3XX_OIOWTVR (volatile u32 *)IOP3XX_REG_ADDR(0x015c) | ||
58 | #define IOP3XX_OMWTVR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0160) | ||
59 | #define IOP3XX_OUMWTVR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0164) | ||
60 | #define IOP3XX_OMWTVR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0168) | ||
61 | #define IOP3XX_OUMWTVR1 (volatile u32 *)IOP3XX_REG_ADDR(0x016c) | ||
62 | #define IOP3XX_OUDWTVR (volatile u32 *)IOP3XX_REG_ADDR(0x0178) | ||
63 | #define IOP3XX_ATUCR (volatile u32 *)IOP3XX_REG_ADDR(0x0180) | ||
64 | #define IOP3XX_PCSR (volatile u32 *)IOP3XX_REG_ADDR(0x0184) | ||
65 | #define IOP3XX_ATUISR (volatile u32 *)IOP3XX_REG_ADDR(0x0188) | ||
66 | #define IOP3XX_ATUIMR (volatile u32 *)IOP3XX_REG_ADDR(0x018c) | ||
67 | #define IOP3XX_IABAR3 (volatile u32 *)IOP3XX_REG_ADDR(0x0190) | ||
68 | #define IOP3XX_IAUBAR3 (volatile u32 *)IOP3XX_REG_ADDR(0x0194) | ||
69 | #define IOP3XX_IALR3 (volatile u32 *)IOP3XX_REG_ADDR(0x0198) | ||
70 | #define IOP3XX_IATVR3 (volatile u32 *)IOP3XX_REG_ADDR(0x019c) | ||
71 | #define IOP3XX_OCCAR (volatile u32 *)IOP3XX_REG_ADDR(0x01a4) | ||
72 | #define IOP3XX_OCCDR (volatile u32 *)IOP3XX_REG_ADDR(0x01ac) | ||
73 | #define IOP3XX_PDSCR (volatile u32 *)IOP3XX_REG_ADDR(0x01bc) | ||
74 | #define IOP3XX_PMCAPID (volatile u8 *)IOP3XX_REG_ADDR(0x01c0) | ||
75 | #define IOP3XX_PMNEXT (volatile u8 *)IOP3XX_REG_ADDR(0x01c1) | ||
76 | #define IOP3XX_APMCR (volatile u16 *)IOP3XX_REG_ADDR(0x01c2) | ||
77 | #define IOP3XX_APMCSR (volatile u16 *)IOP3XX_REG_ADDR(0x01c4) | ||
78 | #define IOP3XX_PCIXCAPID (volatile u8 *)IOP3XX_REG_ADDR(0x01e0) | ||
79 | #define IOP3XX_PCIXNEXT (volatile u8 *)IOP3XX_REG_ADDR(0x01e1) | ||
80 | #define IOP3XX_PCIXCMD (volatile u16 *)IOP3XX_REG_ADDR(0x01e2) | ||
81 | #define IOP3XX_PCIXSR (volatile u32 *)IOP3XX_REG_ADDR(0x01e4) | ||
82 | #define IOP3XX_PCIIRSR (volatile u32 *)IOP3XX_REG_ADDR(0x01ec) | ||
83 | |||
26 | /* I2C bus interface unit */ | 84 | /* I2C bus interface unit */ |
27 | #define IOP3XX_ICR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1680) | 85 | #define IOP3XX_ICR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1680) |
28 | #define IOP3XX_ISR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1684) | 86 | #define IOP3XX_ISR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1684) |
@@ -41,10 +99,12 @@ | |||
41 | */ | 99 | */ |
42 | #define IOP3XX_PCI_MEM_WINDOW_SIZE 0x04000000 | 100 | #define IOP3XX_PCI_MEM_WINDOW_SIZE 0x04000000 |
43 | #define IOP3XX_PCI_LOWER_MEM_PA 0x80000000 | 101 | #define IOP3XX_PCI_LOWER_MEM_PA 0x80000000 |
102 | #define IOP3XX_PCI_LOWER_MEM_BA (*IOP3XX_OMWTVR0) | ||
44 | 103 | ||
45 | #define IOP3XX_PCI_IO_WINDOW_SIZE 0x00010000 | 104 | #define IOP3XX_PCI_IO_WINDOW_SIZE 0x00010000 |
46 | #define IOP3XX_PCI_LOWER_IO_PA 0x90000000 | 105 | #define IOP3XX_PCI_LOWER_IO_PA 0x90000000 |
47 | #define IOP3XX_PCI_LOWER_IO_VA 0xfe000000 | 106 | #define IOP3XX_PCI_LOWER_IO_VA 0xfe000000 |
107 | #define IOP3XX_PCI_LOWER_IO_BA (*IOP3XX_OIOWTVR) | ||
48 | 108 | ||
49 | 109 | ||
50 | #ifndef __ASSEMBLY__ | 110 | #ifndef __ASSEMBLY__ |