[ARM] 4187/1: iop: unify time implementation across iop32x, iop33x, and iop13xx

* architecture specific details are handled in asm/arch/time.h
* ARCH_IOP13XX now selects PLAT_IOP
* as suggested by Lennert use ifdef CONFIG_XSCALE to skip the cp_wait on
XSC3

Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 45 insertions, 10 deletions

diff --git a/include/asm-arm/hardware/iop3xx.h b/include/asm-arm/hardware/iop3xx.h
index 47fcbf6f52d3..15141a9caca8 100644
--- a/include/asm-arm/hardware/iop3xx.h
+++ b/include/asm-arm/hardware/iop3xx.h
@@ -188,14 +188,10 @@ extern void gpio_line_set(int line, int value);
 #define IOP3XX_TU_TRR1          (volatile u32 *)IOP3XX_TIMER_REG(0x0014)
 #define IOP3XX_TU_TISR          (volatile u32 *)IOP3XX_TIMER_REG(0x0018)
 #define IOP3XX_TU_WDTCR         (volatile u32 *)IOP3XX_TIMER_REG(0x001c)
-#define IOP3XX_TMR_TC           0x01
-#define IOP3XX_TMR_EN           0x02
-#define IOP3XX_TMR_RELOAD       0x04
-#define IOP3XX_TMR_PRIVILEGED   0x09
-#define IOP3XX_TMR_RATIO_1_1    0x00
-#define IOP3XX_TMR_RATIO_4_1    0x10
-#define IOP3XX_TMR_RATIO_8_1    0x20
-#define IOP3XX_TMR_RATIO_16_1   0x30
+#define IOP_TMR_EN          0x02
+#define IOP_TMR_RELOAD      0x04
+#define IOP_TMR_PRIVILEGED 0x08
+#define IOP_TMR_RATIO_1_1  0x00
 
 /* Application accelerator unit  */
 #define IOP3XX_AAU_ACR          (volatile u32 *)IOP3XX_REG_ADDR(0x0800)
@@ -276,9 +272,48 @@ extern void gpio_line_set(int line, int value);
 
 #ifndef __ASSEMBLY__
 void iop3xx_map_io(void);
-void iop3xx_init_time(unsigned long);
-unsigned long iop3xx_gettimeoffset(void);
 void iop_init_cp6_handler(void);
+void iop_init_time(unsigned long tickrate);
+unsigned long iop_gettimeoffset(void);
+
+static inline void write_tmr0(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (val));
+}
+
+static inline void write_tmr1(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (val));
+}
+
+static inline u32 read_tcr0(void)
+{
+        u32 val;
+        asm volatile("mrc p6, 0, %0, c2, c1, 0" : "=r" (val));
+        return val;
+}
+
+static inline u32 read_tcr1(void)
+{
+        u32 val;
+        asm volatile("mrc p6, 0, %0, c3, c1, 0" : "=r" (val));
+        return val;
+}
+
+static inline void write_trr0(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (val));
+}
+
+static inline void write_trr1(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (val));
+}
+
+static inline void write_tisr(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (val));
+}
 
 extern struct platform_device iop3xx_i2c0_device;
 extern struct platform_device iop3xx_i2c1_device;