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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-arm/hardware/ioc.h
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-arm/hardware/ioc.h')
-rw-r--r--include/asm-arm/hardware/ioc.h72
1 files changed, 72 insertions, 0 deletions
diff --git a/include/asm-arm/hardware/ioc.h b/include/asm-arm/hardware/ioc.h
new file mode 100644
index 000000000000..b3b46ef65943
--- /dev/null
+++ b/include/asm-arm/hardware/ioc.h
@@ -0,0 +1,72 @@
1/*
2 * linux/include/asm-arm/hardware/ioc.h
3 *
4 * Copyright (C) Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Use these macros to read/write the IOC. All it does is perform the actual
11 * read/write.
12 */
13#ifndef __ASMARM_HARDWARE_IOC_H
14#define __ASMARM_HARDWARE_IOC_H
15
16#ifndef __ASSEMBLY__
17
18/*
19 * We use __raw_base variants here so that we give the compiler the
20 * chance to keep IOC_BASE in a register.
21 */
22#define ioc_readb(off) __raw_readb(IOC_BASE + (off))
23#define ioc_writeb(val,off) __raw_writeb(val, IOC_BASE + (off))
24
25#endif
26
27#define IOC_CONTROL (0x00)
28#define IOC_KARTTX (0x04)
29#define IOC_KARTRX (0x04)
30
31#define IOC_IRQSTATA (0x10)
32#define IOC_IRQREQA (0x14)
33#define IOC_IRQCLRA (0x14)
34#define IOC_IRQMASKA (0x18)
35
36#define IOC_IRQSTATB (0x20)
37#define IOC_IRQREQB (0x24)
38#define IOC_IRQMASKB (0x28)
39
40#define IOC_FIQSTAT (0x30)
41#define IOC_FIQREQ (0x34)
42#define IOC_FIQMASK (0x38)
43
44#define IOC_T0CNTL (0x40)
45#define IOC_T0LTCHL (0x40)
46#define IOC_T0CNTH (0x44)
47#define IOC_T0LTCHH (0x44)
48#define IOC_T0GO (0x48)
49#define IOC_T0LATCH (0x4c)
50
51#define IOC_T1CNTL (0x50)
52#define IOC_T1LTCHL (0x50)
53#define IOC_T1CNTH (0x54)
54#define IOC_T1LTCHH (0x54)
55#define IOC_T1GO (0x58)
56#define IOC_T1LATCH (0x5c)
57
58#define IOC_T2CNTL (0x60)
59#define IOC_T2LTCHL (0x60)
60#define IOC_T2CNTH (0x64)
61#define IOC_T2LTCHH (0x64)
62#define IOC_T2GO (0x68)
63#define IOC_T2LATCH (0x6c)
64
65#define IOC_T3CNTL (0x70)
66#define IOC_T3LTCHL (0x70)
67#define IOC_T3CNTH (0x74)
68#define IOC_T3LTCHH (0x74)
69#define IOC_T3GO (0x78)
70#define IOC_T3LATCH (0x7c)
71
72#endif