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author | Catalin Marinas <catalin.marinas@arm.com> | 2007-02-05 08:47:46 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-02-08 09:49:18 -0500 |
commit | 620879c9e33262426db0ade650be5d7a2046377b (patch) | |
tree | 458be4f1bed4cb143f40b6b438c49afe9e2cb248 /include/asm-arm/domain.h | |
parent | dcda7e4ba1adec80089ec784964b32f9fd653237 (diff) |
[ARM] 4127/1: Flush the prefetch buffer after changing the DACR
The ARM Architecture Reference Manual specifies that a prefetch flush
is needed after changing the DACR register (chapter B2.7.6).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/domain.h')
-rw-r--r-- | include/asm-arm/domain.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-arm/domain.h b/include/asm-arm/domain.h index 4c2885abbe6c..3c12a7625304 100644 --- a/include/asm-arm/domain.h +++ b/include/asm-arm/domain.h | |||
@@ -57,6 +57,7 @@ | |||
57 | __asm__ __volatile__( \ | 57 | __asm__ __volatile__( \ |
58 | "mcr p15, 0, %0, c3, c0 @ set domain" \ | 58 | "mcr p15, 0, %0, c3, c0 @ set domain" \ |
59 | : : "r" (x)); \ | 59 | : : "r" (x)); \ |
60 | isb(); \ | ||
60 | } while (0) | 61 | } while (0) |
61 | 62 | ||
62 | #define modify_domain(dom,type) \ | 63 | #define modify_domain(dom,type) \ |