diff options
| author | Stanislav Samsonov <samsonov@marvell.com> | 2008-06-03 04:24:40 -0400 |
|---|---|---|
| committer | Lennert Buytenhek <buytenh@marvell.com> | 2008-06-22 16:45:03 -0400 |
| commit | 836a8051d54525e0782f156dcfa3c13d30f22840 (patch) | |
| tree | a72c16e6bbfb4b4768562bc9757bdd04b17e4c7f /include/asm-arm/cacheflush.h | |
| parent | 7ea217a85e38c5ed6edbc789670badb619da9f28 (diff) | |
[ARM] Feroceon: L1 cache range operation support
This patch adds support for the L1 D cache range operations that
are supported by the Marvell Discovery Duo and Marvell Kirkwood
ARM SoCs.
Signed-off-by: Stanislav Samsonov <samsonov@marvell.com>
Acked-by: Saeed Bishara <saeed@marvell.com>
Reviewed-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Diffstat (limited to 'include/asm-arm/cacheflush.h')
| -rw-r--r-- | include/asm-arm/cacheflush.h | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index 759a97b56eed..b85d426bb528 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h | |||
| @@ -95,11 +95,7 @@ | |||
| 95 | #endif | 95 | #endif |
| 96 | 96 | ||
| 97 | #if defined(CONFIG_CPU_FEROCEON) | 97 | #if defined(CONFIG_CPU_FEROCEON) |
| 98 | # ifdef _CACHE | 98 | # define MULTI_CACHE 1 |
| 99 | # define MULTI_CACHE 1 | ||
| 100 | # else | ||
| 101 | # define _CACHE feroceon | ||
| 102 | # endif | ||
| 103 | #endif | 99 | #endif |
| 104 | 100 | ||
| 105 | #if defined(CONFIG_CPU_V6) | 101 | #if defined(CONFIG_CPU_V6) |