diff options
author | Lennert Buytenhek <buytenh@wantstofly.org> | 2006-09-20 22:35:20 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-09-25 05:34:03 -0400 |
commit | e7cc2c59cc83558fc26f17eee3c8f901119f0a7c (patch) | |
tree | 5aa69457ad2fc134e7459fadc79beb682add2319 /include/asm-arm/bitops.h | |
parent | 0c92e830bd39f3e6cf7b151dffecafbdc623496c (diff) |
[ARM] 3852/1: convert atomic bitops and __xchg over to raw_local_irq_{save,restore}
Thomas Gleixner noticed that bitops.h should also use the raw_* irq
disable/enable variants, and __xchg needs them as well.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/bitops.h')
-rw-r--r-- | include/asm-arm/bitops.h | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/include/asm-arm/bitops.h b/include/asm-arm/bitops.h index 0ac54b1a8bad..b41831b6432f 100644 --- a/include/asm-arm/bitops.h +++ b/include/asm-arm/bitops.h | |||
@@ -37,9 +37,9 @@ static inline void ____atomic_set_bit(unsigned int bit, volatile unsigned long * | |||
37 | 37 | ||
38 | p += bit >> 5; | 38 | p += bit >> 5; |
39 | 39 | ||
40 | local_irq_save(flags); | 40 | raw_local_irq_save(flags); |
41 | *p |= mask; | 41 | *p |= mask; |
42 | local_irq_restore(flags); | 42 | raw_local_irq_restore(flags); |
43 | } | 43 | } |
44 | 44 | ||
45 | static inline void ____atomic_clear_bit(unsigned int bit, volatile unsigned long *p) | 45 | static inline void ____atomic_clear_bit(unsigned int bit, volatile unsigned long *p) |
@@ -49,9 +49,9 @@ static inline void ____atomic_clear_bit(unsigned int bit, volatile unsigned long | |||
49 | 49 | ||
50 | p += bit >> 5; | 50 | p += bit >> 5; |
51 | 51 | ||
52 | local_irq_save(flags); | 52 | raw_local_irq_save(flags); |
53 | *p &= ~mask; | 53 | *p &= ~mask; |
54 | local_irq_restore(flags); | 54 | raw_local_irq_restore(flags); |
55 | } | 55 | } |
56 | 56 | ||
57 | static inline void ____atomic_change_bit(unsigned int bit, volatile unsigned long *p) | 57 | static inline void ____atomic_change_bit(unsigned int bit, volatile unsigned long *p) |
@@ -61,9 +61,9 @@ static inline void ____atomic_change_bit(unsigned int bit, volatile unsigned lon | |||
61 | 61 | ||
62 | p += bit >> 5; | 62 | p += bit >> 5; |
63 | 63 | ||
64 | local_irq_save(flags); | 64 | raw_local_irq_save(flags); |
65 | *p ^= mask; | 65 | *p ^= mask; |
66 | local_irq_restore(flags); | 66 | raw_local_irq_restore(flags); |
67 | } | 67 | } |
68 | 68 | ||
69 | static inline int | 69 | static inline int |
@@ -75,10 +75,10 @@ ____atomic_test_and_set_bit(unsigned int bit, volatile unsigned long *p) | |||
75 | 75 | ||
76 | p += bit >> 5; | 76 | p += bit >> 5; |
77 | 77 | ||
78 | local_irq_save(flags); | 78 | raw_local_irq_save(flags); |
79 | res = *p; | 79 | res = *p; |
80 | *p = res | mask; | 80 | *p = res | mask; |
81 | local_irq_restore(flags); | 81 | raw_local_irq_restore(flags); |
82 | 82 | ||
83 | return res & mask; | 83 | return res & mask; |
84 | } | 84 | } |
@@ -92,10 +92,10 @@ ____atomic_test_and_clear_bit(unsigned int bit, volatile unsigned long *p) | |||
92 | 92 | ||
93 | p += bit >> 5; | 93 | p += bit >> 5; |
94 | 94 | ||
95 | local_irq_save(flags); | 95 | raw_local_irq_save(flags); |
96 | res = *p; | 96 | res = *p; |
97 | *p = res & ~mask; | 97 | *p = res & ~mask; |
98 | local_irq_restore(flags); | 98 | raw_local_irq_restore(flags); |
99 | 99 | ||
100 | return res & mask; | 100 | return res & mask; |
101 | } | 101 | } |
@@ -109,10 +109,10 @@ ____atomic_test_and_change_bit(unsigned int bit, volatile unsigned long *p) | |||
109 | 109 | ||
110 | p += bit >> 5; | 110 | p += bit >> 5; |
111 | 111 | ||
112 | local_irq_save(flags); | 112 | raw_local_irq_save(flags); |
113 | res = *p; | 113 | res = *p; |
114 | *p = res ^ mask; | 114 | *p = res ^ mask; |
115 | local_irq_restore(flags); | 115 | raw_local_irq_restore(flags); |
116 | 116 | ||
117 | return res & mask; | 117 | return res & mask; |
118 | } | 118 | } |