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authorJeff Garzik <jeff@garzik.org>2006-03-29 17:18:49 -0500
committerJeff Garzik <jeff@garzik.org>2006-03-29 17:18:49 -0500
commite02a4cabfcb9a999b74a2e2e6f13ffcb7ff2d606 (patch)
tree2f3db60be4c57eca2a4c3ab3f3122dcf1ec0c624 /include/asm-arm/assembler.h
parent600511e86babe3727264a0883a3a264f6fb6caf5 (diff)
parentf3cab8a0b1a772dc8b055b7affa567a366627c9e (diff)
Merge branch 'master'
Diffstat (limited to 'include/asm-arm/assembler.h')
-rw-r--r--include/asm-arm/assembler.h27
1 files changed, 22 insertions, 5 deletions
diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h
index f31ac92b6c7f..d53bafa9bf1c 100644
--- a/include/asm-arm/assembler.h
+++ b/include/asm-arm/assembler.h
@@ -80,16 +80,33 @@
80 instr regs 80 instr regs
81 81
82/* 82/*
83 * Save the current IRQ state and disable IRQs. Note that this macro 83 * Enable and disable interrupts
84 * assumes FIQs are enabled, and that the processor is in SVC mode.
85 */ 84 */
86 .macro save_and_disable_irqs, oldcpsr
87 mrs \oldcpsr, cpsr
88#if __LINUX_ARM_ARCH__ >= 6 85#if __LINUX_ARM_ARCH__ >= 6
86 .macro disable_irq
89 cpsid i 87 cpsid i
88 .endm
89
90 .macro enable_irq
91 cpsie i
92 .endm
90#else 93#else
91 msr cpsr_c, #PSR_I_BIT | MODE_SVC 94 .macro disable_irq
95 msr cpsr_c, #PSR_I_BIT | SVC_MODE
96 .endm
97
98 .macro enable_irq
99 msr cpsr_c, #SVC_MODE
100 .endm
92#endif 101#endif
102
103/*
104 * Save the current IRQ state and disable IRQs. Note that this macro
105 * assumes FIQs are enabled, and that the processor is in SVC mode.
106 */
107 .macro save_and_disable_irqs, oldcpsr
108 mrs \oldcpsr, cpsr
109 disable_irq
93 .endm 110 .endm
94 111
95/* 112/*