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authorDan Williams <dan.j.williams@intel.com>2007-02-16 16:16:32 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-17 10:04:29 -0500
commitf80dff9da07d81da16e3b842118d47b9febf9c01 (patch)
treeea2da17c5af516c241b3ea3b4dd4fa47d9d86769 /include/asm-arm/arch-versatile
parent588ef7693574cfbcb228f48d5478c2b39a9b0c9f (diff)
[ARM] 4185/2: entry: introduce get_irqnr_preamble and arch_ret_to_user
get_irqnr_preamble allows machines to take some action before entering the get_irqnr_and_base loop. On iop we enable cp6 access. arch_ret_to_user is added to the userspace return path to allow individual architectures to take actions, like disabling coprocessor access, before the final return to userspace. Per Nicolas Pitre's note, there is no need to cp_wait on the return to user as the latency to return is sufficient. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-versatile')
-rw-r--r--include/asm-arm/arch-versatile/entry-macro.S6
1 files changed, 6 insertions, 0 deletions
diff --git a/include/asm-arm/arch-versatile/entry-macro.S b/include/asm-arm/arch-versatile/entry-macro.S
index feff771c0a0a..0fae002637a0 100644
--- a/include/asm-arm/arch-versatile/entry-macro.S
+++ b/include/asm-arm/arch-versatile/entry-macro.S
@@ -13,6 +13,12 @@
13 .macro disable_fiq 13 .macro disable_fiq
14 .endm 14 .endm
15 15
16 .macro get_irqnr_preamble, base, tmp
17 .endm
18
19 .macro arch_ret_to_user, tmp1, tmp2
20 .endm
21
16 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 22 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
17 ldr \base, =IO_ADDRESS(VERSATILE_VIC_BASE) 23 ldr \base, =IO_ADDRESS(VERSATILE_VIC_BASE)
18 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status 24 ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status