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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2006-04-04 16:47:43 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-04-07 08:22:21 -0400
commit74d02fb9543ec85b04319b5b50926c78e7f07f3e (patch)
treece98ba7ac0634f939e29ecf50d11382ff2ebec1a /include/asm-arm/arch-shark
parent7d12963757b9170f162f317b7461353c5fb574e8 (diff)
[ARM] Move FLUSH_BASE macros to asm/arch/memory.h
FLUSH_BASE must be visible to arch/arm/mm/init.c in order for the memory region to be setup. Move these definitions from asm-arm/arch-*/hardware.h into asm-arm/arch-*/memory.h where mm stuff can see them. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-shark')
-rw-r--r--include/asm-arm/arch-shark/hardware.h6
-rw-r--r--include/asm-arm/arch-shark/memory.h6
2 files changed, 6 insertions, 6 deletions
diff --git a/include/asm-arm/arch-shark/hardware.h b/include/asm-arm/arch-shark/hardware.h
index 4d35f8c154c3..ecba45260898 100644
--- a/include/asm-arm/arch-shark/hardware.h
+++ b/include/asm-arm/arch-shark/hardware.h
@@ -17,11 +17,6 @@
17 */ 17 */
18#define IO_BASE 0xe0000000 18#define IO_BASE 0xe0000000
19 19
20/*
21 * RAM definitions
22 */
23#define FLUSH_BASE_PHYS 0x80000000
24
25#else 20#else
26 21
27#define IO_BASE 0 22#define IO_BASE 0
@@ -33,7 +28,6 @@
33#define ROMCARD_SIZE 0x08000000 28#define ROMCARD_SIZE 0x08000000
34#define ROMCARD_START 0x10000000 29#define ROMCARD_START 0x10000000
35 30
36#define FLUSH_BASE 0xdf000000
37#define PCIO_BASE 0xe0000000 31#define PCIO_BASE 0xe0000000
38 32
39 33
diff --git a/include/asm-arm/arch-shark/memory.h b/include/asm-arm/arch-shark/memory.h
index 95a29b4bc5d0..6968d6103ea0 100644
--- a/include/asm-arm/arch-shark/memory.h
+++ b/include/asm-arm/arch-shark/memory.h
@@ -39,4 +39,10 @@ static inline void __arch_adjust_zones(int node, unsigned long *zone_size, unsig
39#define __virt_to_bus(x) __virt_to_phys(x) 39#define __virt_to_bus(x) __virt_to_phys(x)
40#define __bus_to_virt(x) __phys_to_virt(x) 40#define __bus_to_virt(x) __phys_to_virt(x)
41 41
42/*
43 * Cache flushing area
44 */
45#define FLUSH_BASE_PHYS 0x80000000
46#define FLUSH_BASE 0xdf000000
47
42#endif 48#endif