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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2006-11-30 15:39:18 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-11-30 17:52:28 -0500
commitb7dc96d75309346c1213875be68fdbbec92da5e7 (patch)
treeb6f85da5e99cb3f20fef42504ce7b82b4a69c6fc /include/asm-arm/arch-sa1100
parent0215ffb08ce99e2bb59eca114a99499a4d06e704 (diff)
[ARM] Clean up discontigmem support
Most architectures have fairly simple discontiguous memory - a simple set of successive regions each containing some memory. These can be described simply as a log2 of their maximum size, along with the base address of the first region and the number of regions. The base address is already described by PHYS_PFN_OFFSET, and the number of regions via the MAX_NUMNODES and the number of online nodes. If we then supply the log2 of their maximum size, all the other discontigmem macros can move into generic code. There is one exception: lh7a40x seems to have a more complicated setup; this is left alone. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-sa1100')
-rw-r--r--include/asm-arm/arch-sa1100/memory.h34
1 files changed, 1 insertions, 33 deletions
diff --git a/include/asm-arm/arch-sa1100/memory.h b/include/asm-arm/arch-sa1100/memory.h
index 1ff172dc8e33..0e907fc6d42a 100644
--- a/include/asm-arm/arch-sa1100/memory.h
+++ b/include/asm-arm/arch-sa1100/memory.h
@@ -39,7 +39,6 @@ void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes);
39#define __virt_to_bus(x) __virt_to_phys(x) 39#define __virt_to_bus(x) __virt_to_phys(x)
40#define __bus_to_virt(x) __phys_to_virt(x) 40#define __bus_to_virt(x) __phys_to_virt(x)
41 41
42#ifdef CONFIG_DISCONTIGMEM
43/* 42/*
44 * Because of the wide memory address space between physical RAM banks on the 43 * Because of the wide memory address space between physical RAM banks on the
45 * SA1100, it's much convenient to use Linux's NUMA support to implement our 44 * SA1100, it's much convenient to use Linux's NUMA support to implement our
@@ -57,38 +56,7 @@ void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes);
57 * node 2: 0xd0000000 - 0xd7ffffff 56 * node 2: 0xd0000000 - 0xd7ffffff
58 * node 3: 0xd8000000 - 0xdfffffff 57 * node 3: 0xd8000000 - 0xdfffffff
59 */ 58 */
60 59#define NODE_MEM_SIZE_BITS 27
61/*
62 * Given a kernel address, find the home node of the underlying memory.
63 */
64#define KVADDR_TO_NID(addr) (((unsigned long)(addr) - PAGE_OFFSET) >> 27)
65
66/*
67 * Given a page frame number, convert it to a node id.
68 */
69#define PFN_TO_NID(pfn) (((pfn) - PHYS_PFN_OFFSET) >> (27 - PAGE_SHIFT))
70
71/*
72 * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory
73 * and return the mem_map of that node.
74 */
75#define ADDR_TO_MAPBASE(kaddr) NODE_MEM_MAP(KVADDR_TO_NID(kaddr))
76
77/*
78 * Given a page frame number, find the owning node of the memory
79 * and return the mem_map of that node.
80 */
81#define PFN_TO_MAPBASE(pfn) NODE_MEM_MAP(PFN_TO_NID(pfn))
82
83/*
84 * Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory
85 * and returns the index corresponding to the appropriate page in the
86 * node's mem_map.
87 */
88#define LOCAL_MAP_NR(addr) \
89 (((unsigned long)(addr) & 0x07ffffff) >> PAGE_SHIFT)
90
91#endif
92 60
93/* 61/*
94 * Cache flushing area - SA1100 zero bank 62 * Cache flushing area - SA1100 zero bank