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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-arm/arch-sa1100/debug-macro.S
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-arm/arch-sa1100/debug-macro.S')
-rw-r--r--include/asm-arm/arch-sa1100/debug-macro.S57
1 files changed, 57 insertions, 0 deletions
diff --git a/include/asm-arm/arch-sa1100/debug-macro.S b/include/asm-arm/arch-sa1100/debug-macro.S
new file mode 100644
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+++ b/include/asm-arm/arch-sa1100/debug-macro.S
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1/* linux/include/asm-arm/arch-sa1100/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14 .macro addruart,rx
15 mrc p15, 0, \rx, c1, c0
16 tst \rx, #1 @ MMU enabled?
17 moveq \rx, #0x80000000 @ physical base address
18 movne \rx, #0xf8000000 @ virtual address
19
20 @ We probe for the active serial port here, coherently with
21 @ the comment in include/asm-arm/arch-sa1100/uncompress.h.
22 @ We assume r1 can be clobbered.
23
24 @ see if Ser3 is active
25 add \rx, \rx, #0x00050000
26 ldr r1, [\rx, #UTCR3]
27 tst r1, #UTCR3_TXE
28
29 @ if Ser3 is inactive, then try Ser1
30 addeq \rx, \rx, #(0x00010000 - 0x00050000)
31 ldreq r1, [\rx, #UTCR3]
32 tsteq r1, #UTCR3_TXE
33
34 @ if Ser1 is inactive, then try Ser2
35 addeq \rx, \rx, #(0x00030000 - 0x00010000)
36 ldreq r1, [\rx, #UTCR3]
37 tsteq r1, #UTCR3_TXE
38
39 @ if all ports are inactive, then there is nothing we can do
40 moveq pc, lr
41 .endm
42
43 .macro senduart,rd,rx
44 str \rd, [\rx, #UTDR]
45 .endm
46
47 .macro waituart,rd,rx
481001: ldr \rd, [\rx, #UTSR1]
49 tst \rd, #UTSR1_TNF
50 beq 1001b
51 .endm
52
53 .macro busyuart,rd,rx
541001: ldr \rd, [\rx, #UTSR1]
55 tst \rd, #UTSR1_TBY
56 bne 1001b
57 .endm