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authorBen Dooks <ben-linux@fluff.org>2007-09-30 04:56:13 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-10-12 18:43:28 -0400
commit987240cc01faf90100ace8f554ac145c2dfb085c (patch)
tree86285a0e5dbf6eabba1216b6d20530087cdd2fbd /include/asm-arm/arch-s3c2410
parent180005c4efb76a81fd0abcef4c2412d238eea20c (diff)
[ARM] 4586/1: S3C2412: power register updates
Add the INFORM register block which are retained over sleep. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-s3c2410')
-rw-r--r--include/asm-arm/arch-s3c2410/regs-power.h5
-rw-r--r--include/asm-arm/arch-s3c2410/regs-s3c2412.h2
2 files changed, 7 insertions, 0 deletions
diff --git a/include/asm-arm/arch-s3c2410/regs-power.h b/include/asm-arm/arch-s3c2410/regs-power.h
index 94ff96505b6a..f79987be55e8 100644
--- a/include/asm-arm/arch-s3c2410/regs-power.h
+++ b/include/asm-arm/arch-s3c2410/regs-power.h
@@ -18,6 +18,11 @@
18#define S3C2412_PWRMODECON S3C24XX_PWRREG(0x20) 18#define S3C2412_PWRMODECON S3C24XX_PWRREG(0x20)
19#define S3C2412_PWRCFG S3C24XX_PWRREG(0x24) 19#define S3C2412_PWRCFG S3C24XX_PWRREG(0x24)
20 20
21#define S3C2412_INFORM0 S3C24XX_PWRREG(0x70)
22#define S3C2412_INFORM1 S3C24XX_PWRREG(0x74)
23#define S3C2412_INFORM2 S3C24XX_PWRREG(0x78)
24#define S3C2412_INFORM3 S3C24XX_PWRREG(0x7C)
25
21#define S3C2412_PWRCFG_BATF_IGNORE (0<<0) 26#define S3C2412_PWRCFG_BATF_IGNORE (0<<0)
22#define S3C2412_PWRCFG_BATF_SLEEP (3<<0) 27#define S3C2412_PWRCFG_BATF_SLEEP (3<<0)
23#define S3C2412_PWRCFG_BATF_MASK (3<<0) 28#define S3C2412_PWRCFG_BATF_MASK (3<<0)
diff --git a/include/asm-arm/arch-s3c2410/regs-s3c2412.h b/include/asm-arm/arch-s3c2410/regs-s3c2412.h
index 8ca6a3bc8555..783b18f5bcea 100644
--- a/include/asm-arm/arch-s3c2410/regs-s3c2412.h
+++ b/include/asm-arm/arch-s3c2410/regs-s3c2412.h
@@ -17,5 +17,7 @@
17#define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30) 17#define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30)
18#define S3C2412_SWRST_RESET (0x533C2412) 18#define S3C2412_SWRST_RESET (0x533C2412)
19 19
20/* see regs-power.h for the other registers in the power block. */
21
20#endif /* __ASM_ARCH_REGS_S3C2412_H */ 22#endif /* __ASM_ARCH_REGS_S3C2412_H */
21 23