diff options
author | Ben Dooks <ben-linux@fluff.org> | 2006-09-20 16:57:06 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-09-25 05:33:59 -0400 |
commit | 3b7a86c2f01dafa797908fdcf386f51eb0d01f29 (patch) | |
tree | 0dc5f1b66573258e2eeb7058aa18b8bb03d89808 /include/asm-arm/arch-s3c2410 | |
parent | bccd7458c0f6229a8cfbfad6c1fc0894b1d5fee8 (diff) |
[ARM] 3846/1: S3C24XX: Fix osiris memory map
The memory mapping for the Osiris machine
are all off by one bit, and the base address
has been fixed for writing (bit25 is being
checked by the write, but not on read)
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-s3c2410')
-rw-r--r-- | include/asm-arm/arch-s3c2410/osiris-map.h | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/include/asm-arm/arch-s3c2410/osiris-map.h b/include/asm-arm/arch-s3c2410/osiris-map.h index e2d406218ae5..a14164dfa525 100644 --- a/include/asm-arm/arch-s3c2410/osiris-map.h +++ b/include/asm-arm/arch-s3c2410/osiris-map.h | |||
@@ -18,22 +18,22 @@ | |||
18 | 18 | ||
19 | /* start peripherals off after the S3C2410 */ | 19 | /* start peripherals off after the S3C2410 */ |
20 | 20 | ||
21 | #define OSIRIS_IOADDR(x) (S3C2410_ADDR((x) + 0x05000000)) | 21 | #define OSIRIS_IOADDR(x) (S3C2410_ADDR((x) + 0x04000000)) |
22 | 22 | ||
23 | #define OSIRIS_PA_CPLD (S3C2410_CS1 | (3<<25)) | 23 | #define OSIRIS_PA_CPLD (S3C2410_CS1 | (1<<26)) |
24 | 24 | ||
25 | /* we put the CPLD registers next, to get them out of the way */ | 25 | /* we put the CPLD registers next, to get them out of the way */ |
26 | 26 | ||
27 | #define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00000000) /* 0x01300000 */ | 27 | #define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00000000) |
28 | #define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD) | 28 | #define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD) |
29 | 29 | ||
30 | #define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00100000) /* 0x01400000 */ | 30 | #define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00100000) |
31 | #define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (1<<24)) | 31 | #define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (1<<23)) |
32 | 32 | ||
33 | #define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00200000) /* 0x01500000 */ | 33 | #define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00200000) |
34 | #define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<24)) | 34 | #define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23)) |
35 | 35 | ||
36 | #define OSIRIS_VA_CTRL4 OSIRIS_IOADDR(0x00300000) /* 0x01600000 */ | 36 | #define OSIRIS_VA_CTRL4 OSIRIS_IOADDR(0x00300000) |
37 | #define OSIRIS_PA_CTRL4 (OSIRIS_PA_CPLD + (3<<24)) | 37 | #define OSIRIS_PA_CTRL4 (OSIRIS_PA_CPLD + (3<<23)) |
38 | 38 | ||
39 | #endif /* __ASM_ARCH_OSIRISMAP_H */ | 39 | #endif /* __ASM_ARCH_OSIRISMAP_H */ |