diff options
| author | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2007-01-31 12:24:00 -0500 |
|---|---|---|
| committer | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2007-01-31 12:24:00 -0500 |
| commit | 30716e07ef511ec7525c07eb1e8060ba8943c2a2 (patch) | |
| tree | eb6a47cae63d3587fa773cc5a16781eaa2c7810b /include/asm-arm/arch-s3c2410 | |
| parent | 03c79cc56e4497cbd09d74a73c1bd0d1d9a8a16c (diff) | |
| parent | f56df2f4db6e4af87fb8e941cff69f4501a111df (diff) | |
Merge branch 'linus'
Diffstat (limited to 'include/asm-arm/arch-s3c2410')
| -rw-r--r-- | include/asm-arm/arch-s3c2410/regs-gpio.h | 4 | ||||
| -rw-r--r-- | include/asm-arm/arch-s3c2410/regs-mem.h | 14 |
2 files changed, 9 insertions, 9 deletions
diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h index b2893e32a236..eae91694edcd 100644 --- a/include/asm-arm/arch-s3c2410/regs-gpio.h +++ b/include/asm-arm/arch-s3c2410/regs-gpio.h | |||
| @@ -52,10 +52,10 @@ | |||
| 52 | /* general configuration options */ | 52 | /* general configuration options */ |
| 53 | 53 | ||
| 54 | #define S3C2410_GPIO_LEAVE (0xFFFFFFFF) | 54 | #define S3C2410_GPIO_LEAVE (0xFFFFFFFF) |
| 55 | #define S3C2410_GPIO_INPUT (0xFFFFFFF0) | 55 | #define S3C2410_GPIO_INPUT (0xFFFFFFF0) /* not available on A */ |
| 56 | #define S3C2410_GPIO_OUTPUT (0xFFFFFFF1) | 56 | #define S3C2410_GPIO_OUTPUT (0xFFFFFFF1) |
| 57 | #define S3C2410_GPIO_IRQ (0xFFFFFFF2) /* not available for all */ | 57 | #define S3C2410_GPIO_IRQ (0xFFFFFFF2) /* not available for all */ |
| 58 | #define S3C2410_GPIO_SFN2 (0xFFFFFFF2) /* not available on A */ | 58 | #define S3C2410_GPIO_SFN2 (0xFFFFFFF2) /* bank A => addr/cs/nand */ |
| 59 | #define S3C2410_GPIO_SFN3 (0xFFFFFFF3) /* not available on A */ | 59 | #define S3C2410_GPIO_SFN3 (0xFFFFFFF3) /* not available on A */ |
| 60 | 60 | ||
| 61 | /* register address for the GPIO registers. | 61 | /* register address for the GPIO registers. |
diff --git a/include/asm-arm/arch-s3c2410/regs-mem.h b/include/asm-arm/arch-s3c2410/regs-mem.h index 375dca50364e..e4d82341f7ba 100644 --- a/include/asm-arm/arch-s3c2410/regs-mem.h +++ b/include/asm-arm/arch-s3c2410/regs-mem.h | |||
| @@ -133,10 +133,10 @@ | |||
| 133 | #define S3C2410_BANKCON_SDRAM (0x3 << 15) | 133 | #define S3C2410_BANKCON_SDRAM (0x3 << 15) |
| 134 | 134 | ||
| 135 | /* next bits only for EDO DRAM in 6,7 */ | 135 | /* next bits only for EDO DRAM in 6,7 */ |
| 136 | #define S3C2400_BANKCON_EDO_Trdc1 (0x00 << 4) | 136 | #define S3C2400_BANKCON_EDO_Trcd1 (0x00 << 4) |
| 137 | #define S3C2400_BANKCON_EDO_Trdc2 (0x01 << 4) | 137 | #define S3C2400_BANKCON_EDO_Trcd2 (0x01 << 4) |
| 138 | #define S3C2400_BANKCON_EDO_Trdc3 (0x02 << 4) | 138 | #define S3C2400_BANKCON_EDO_Trcd3 (0x02 << 4) |
| 139 | #define S3C2400_BANKCON_EDO_Trdc4 (0x03 << 4) | 139 | #define S3C2400_BANKCON_EDO_Trcd4 (0x03 << 4) |
| 140 | 140 | ||
| 141 | /* CAS pulse width */ | 141 | /* CAS pulse width */ |
| 142 | #define S3C2400_BANKCON_EDO_PULSE1 (0x00 << 3) | 142 | #define S3C2400_BANKCON_EDO_PULSE1 (0x00 << 3) |
| @@ -153,9 +153,9 @@ | |||
| 153 | #define S3C2400_BANKCON_EDO_SCANb11 (0x03 << 0) | 153 | #define S3C2400_BANKCON_EDO_SCANb11 (0x03 << 0) |
| 154 | 154 | ||
| 155 | /* next bits only for SDRAM in 6,7 */ | 155 | /* next bits only for SDRAM in 6,7 */ |
| 156 | #define S3C2410_BANKCON_Trdc2 (0x00 << 2) | 156 | #define S3C2410_BANKCON_Trcd2 (0x00 << 2) |
| 157 | #define S3C2410_BANKCON_Trdc3 (0x01 << 2) | 157 | #define S3C2410_BANKCON_Trcd3 (0x01 << 2) |
| 158 | #define S3C2410_BANKCON_Trdc4 (0x02 << 2) | 158 | #define S3C2410_BANKCON_Trcd4 (0x02 << 2) |
| 159 | 159 | ||
| 160 | /* control column address select */ | 160 | /* control column address select */ |
| 161 | #define S3C2410_BANKCON_SCANb8 (0x00 << 0) | 161 | #define S3C2410_BANKCON_SCANb8 (0x00 << 0) |