diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-arm/arch-s3c2410/regs-watchdog.h |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'include/asm-arm/arch-s3c2410/regs-watchdog.h')
-rw-r--r-- | include/asm-arm/arch-s3c2410/regs-watchdog.h | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/include/asm-arm/arch-s3c2410/regs-watchdog.h b/include/asm-arm/arch-s3c2410/regs-watchdog.h new file mode 100644 index 000000000000..d199ca6aff22 --- /dev/null +++ b/include/asm-arm/arch-s3c2410/regs-watchdog.h | |||
@@ -0,0 +1,46 @@ | |||
1 | /* linux/include/asm/arch-s3c2410/regs0watchdog.h | ||
2 | * | ||
3 | * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> | ||
4 | * http://www.simtec.co.uk/products/SWLINUX/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * S3C2410 Watchdog timer control | ||
11 | * | ||
12 | * Changelog: | ||
13 | * 21-06-2003 BJD Created file | ||
14 | * 12-03-2004 BJD Updated include protection | ||
15 | * 10-03-2005 LCVR Changed S3C2410_VA to S3C24XX_VA | ||
16 | */ | ||
17 | |||
18 | |||
19 | #ifndef __ASM_ARCH_REGS_WATCHDOG_H | ||
20 | #define __ASM_ARCH_REGS_WATCHDOG_H "$Id: watchdog.h,v 1.2 2003/04/29 13:31:09 ben Exp $" | ||
21 | |||
22 | #define S3C2410_WDOGREG(x) ((x) + S3C24XX_VA_WATCHDOG) | ||
23 | |||
24 | #define S3C2410_WTCON S3C2410_WDOGREG(0x00) | ||
25 | #define S3C2410_WTDAT S3C2410_WDOGREG(0x04) | ||
26 | #define S3C2410_WTCNT S3C2410_WDOGREG(0x08) | ||
27 | |||
28 | /* the watchdog can either generate a reset pulse, or an | ||
29 | * interrupt. | ||
30 | */ | ||
31 | |||
32 | #define S3C2410_WTCON_RSTEN (0x01) | ||
33 | #define S3C2410_WTCON_INTEN (1<<2) | ||
34 | #define S3C2410_WTCON_ENABLE (1<<5) | ||
35 | |||
36 | #define S3C2410_WTCON_DIV16 (0<<3) | ||
37 | #define S3C2410_WTCON_DIV32 (1<<3) | ||
38 | #define S3C2410_WTCON_DIV64 (2<<3) | ||
39 | #define S3C2410_WTCON_DIV128 (3<<3) | ||
40 | |||
41 | #define S3C2410_WTCON_PRESCALE(x) ((x) << 8) | ||
42 | #define S3C2410_WTCON_PRESCALE_MASK (0xff00) | ||
43 | |||
44 | #endif /* __ASM_ARCH_REGS_WATCHDOG_H */ | ||
45 | |||
46 | |||