diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-arm/arch-s3c2410/regs-sdi.h |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'include/asm-arm/arch-s3c2410/regs-sdi.h')
-rw-r--r-- | include/asm-arm/arch-s3c2410/regs-sdi.h | 118 |
1 files changed, 118 insertions, 0 deletions
diff --git a/include/asm-arm/arch-s3c2410/regs-sdi.h b/include/asm-arm/arch-s3c2410/regs-sdi.h new file mode 100644 index 000000000000..ca9a26fbecec --- /dev/null +++ b/include/asm-arm/arch-s3c2410/regs-sdi.h | |||
@@ -0,0 +1,118 @@ | |||
1 | /* linux/include/asm/arch-s3c2410/regs-sdi.h | ||
2 | * | ||
3 | * Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk> | ||
4 | * http://www.simtec.co.uk/products/SWLINUX/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * S3C2410 MMC/SDIO register definitions | ||
11 | * | ||
12 | * Changelog: | ||
13 | * 18-Aug-2004 Ben Dooks Created initial file | ||
14 | * 29-Nov-2004 Koen Martens Added some missing defines, fixed duplicates | ||
15 | * 29-Nov-2004 Ben Dooks Updated Koen's patch | ||
16 | */ | ||
17 | |||
18 | #ifndef __ASM_ARM_REGS_SDI | ||
19 | #define __ASM_ARM_REGS_SDI "regs-sdi.h" | ||
20 | |||
21 | #define S3C2410_SDICON (0x00) | ||
22 | #define S3C2410_SDIPRE (0x04) | ||
23 | #define S3C2410_SDICMDARG (0x08) | ||
24 | #define S3C2410_SDICMDCON (0x0C) | ||
25 | #define S3C2410_SDICMDSTAT (0x10) | ||
26 | #define S3C2410_SDIRSP0 (0x14) | ||
27 | #define S3C2410_SDIRSP1 (0x18) | ||
28 | #define S3C2410_SDIRSP2 (0x1C) | ||
29 | #define S3C2410_SDIRSP3 (0x20) | ||
30 | #define S3C2410_SDITIMER (0x24) | ||
31 | #define S3C2410_SDIBSIZE (0x28) | ||
32 | #define S3C2410_SDIDCON (0x2C) | ||
33 | #define S3C2410_SDIDCNT (0x30) | ||
34 | #define S3C2410_SDIDSTA (0x34) | ||
35 | #define S3C2410_SDIFSTA (0x38) | ||
36 | #define S3C2410_SDIDATA (0x3C) | ||
37 | #define S3C2410_SDIIMSK (0x40) | ||
38 | |||
39 | #define S3C2410_SDICON_BYTEORDER (1<<4) | ||
40 | #define S3C2410_SDICON_SDIOIRQ (1<<3) | ||
41 | #define S3C2410_SDICON_RWAITEN (1<<2) | ||
42 | #define S3C2410_SDICON_FIFORESET (1<<1) | ||
43 | #define S3C2410_SDICON_CLOCKTYPE (1<<0) | ||
44 | |||
45 | #define S3C2410_SDICMDCON_ABORT (1<<12) | ||
46 | #define S3C2410_SDICMDCON_WITHDATA (1<<11) | ||
47 | #define S3C2410_SDICMDCON_LONGRSP (1<<10) | ||
48 | #define S3C2410_SDICMDCON_WAITRSP (1<<9) | ||
49 | #define S3C2410_SDICMDCON_CMDSTART (1<<8) | ||
50 | #define S3C2410_SDICMDCON_INDEX (0xff) | ||
51 | |||
52 | #define S3C2410_SDICMDSTAT_CRCFAIL (1<<12) | ||
53 | #define S3C2410_SDICMDSTAT_CMDSENT (1<<11) | ||
54 | #define S3C2410_SDICMDSTAT_CMDTIMEOUT (1<<10) | ||
55 | #define S3C2410_SDICMDSTAT_RSPFIN (1<<9) | ||
56 | #define S3C2410_SDICMDSTAT_XFERING (1<<8) | ||
57 | #define S3C2410_SDICMDSTAT_INDEX (0xff) | ||
58 | |||
59 | #define S3C2410_SDIDCON_IRQPERIOD (1<<21) | ||
60 | #define S3C2410_SDIDCON_TXAFTERRESP (1<<20) | ||
61 | #define S3C2410_SDIDCON_RXAFTERCMD (1<<19) | ||
62 | #define S3C2410_SDIDCON_BUSYAFTERCMD (1<<18) | ||
63 | #define S3C2410_SDIDCON_BLOCKMODE (1<<17) | ||
64 | #define S3C2410_SDIDCON_WIDEBUS (1<<16) | ||
65 | #define S3C2410_SDIDCON_DMAEN (1<<15) | ||
66 | #define S3C2410_SDIDCON_STOP (1<<14) | ||
67 | #define S3C2410_SDIDCON_DATMODE (3<<12) | ||
68 | #define S3C2410_SDIDCON_BLKNUM (0x7ff) | ||
69 | |||
70 | /* constants for S3C2410_SDIDCON_DATMODE */ | ||
71 | #define S3C2410_SDIDCON_XFER_READY (0<<12) | ||
72 | #define S3C2410_SDIDCON_XFER_CHKSTART (1<<12) | ||
73 | #define S3C2410_SDIDCON_XFER_RXSTART (2<<12) | ||
74 | #define S3C2410_SDIDCON_XFER_TXSTART (3<<12) | ||
75 | |||
76 | #define S3C2410_SDIDCNT_BLKNUM_SHIFT (12) | ||
77 | |||
78 | #define S3C2410_SDIDSTA_RDYWAITREQ (1<<10) | ||
79 | #define S3C2410_SDIDSTA_SDIOIRQDETECT (1<<9) | ||
80 | #define S3C2410_SDIDSTA_FIFOFAIL (1<<8) /* reserved on 2440 */ | ||
81 | #define S3C2410_SDIDSTA_CRCFAIL (1<<7) | ||
82 | #define S3C2410_SDIDSTA_RXCRCFAIL (1<<6) | ||
83 | #define S3C2410_SDIDSTA_DATATIMEOUT (1<<5) | ||
84 | #define S3C2410_SDIDSTA_XFERFINISH (1<<4) | ||
85 | #define S3C2410_SDIDSTA_BUSYFINISH (1<<3) | ||
86 | #define S3C2410_SDIDSTA_SBITERR (1<<2) /* reserved on 2410a/2440 */ | ||
87 | #define S3C2410_SDIDSTA_TXDATAON (1<<1) | ||
88 | #define S3C2410_SDIDSTA_RXDATAON (1<<0) | ||
89 | |||
90 | #define S3C2410_SDIFSTA_TFDET (1<<13) | ||
91 | #define S3C2410_SDIFSTA_RFDET (1<<12) | ||
92 | #define S3C2410_SDIFSTA_TXHALF (1<<11) | ||
93 | #define S3C2410_SDIFSTA_TXEMPTY (1<<10) | ||
94 | #define S3C2410_SDIFSTA_RFLAST (1<<9) | ||
95 | #define S3C2410_SDIFSTA_RFFULL (1<<8) | ||
96 | #define S3C2410_SDIFSTA_RFHALF (1<<7) | ||
97 | #define S3C2410_SDIFSTA_COUNTMASK (0x7f) | ||
98 | |||
99 | #define S3C2410_SDIIMSK_RESPONSECRC (1<<17) | ||
100 | #define S3C2410_SDIIMSK_CMDSENT (1<<16) | ||
101 | #define S3C2410_SDIIMSK_CMDTIMEOUT (1<<15) | ||
102 | #define S3C2410_SDIIMSK_RESPONSEND (1<<14) | ||
103 | #define S3C2410_SDIIMSK_READWAIT (1<<13) | ||
104 | #define S3C2410_SDIIMSK_SDIOIRQ (1<<12) | ||
105 | #define S3C2410_SDIIMSK_FIFOFAIL (1<<11) | ||
106 | #define S3C2410_SDIIMSK_CRCSTATUS (1<<10) | ||
107 | #define S3C2410_SDIIMSK_DATACRC (1<<9) | ||
108 | #define S3C2410_SDIIMSK_DATATIMEOUT (1<<8) | ||
109 | #define S3C2410_SDIIMSK_DATAFINISH (1<<7) | ||
110 | #define S3C2410_SDIIMSK_BUSYFINISH (1<<6) | ||
111 | #define S3C2410_SDIIMSK_SBITERR (1<<5) /* reserved 2440/2410a */ | ||
112 | #define S3C2410_SDIIMSK_TXFIFOHALF (1<<4) | ||
113 | #define S3C2410_SDIIMSK_TXFIFOEMPTY (1<<3) | ||
114 | #define S3C2410_SDIIMSK_RXFIFOLAST (1<<2) | ||
115 | #define S3C2410_SDIIMSK_RXFIFOFULL (1<<1) | ||
116 | #define S3C2410_SDIIMSK_RXFIFOHALF (1<<0) | ||
117 | |||
118 | #endif /* __ASM_ARM_REGS_SDI */ | ||