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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-arm/arch-s3c2410/regs-nand.h
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-arm/arch-s3c2410/regs-nand.h')
-rw-r--r--include/asm-arm/arch-s3c2410/regs-nand.h43
1 files changed, 43 insertions, 0 deletions
diff --git a/include/asm-arm/arch-s3c2410/regs-nand.h b/include/asm-arm/arch-s3c2410/regs-nand.h
new file mode 100644
index 000000000000..c443ac834698
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+++ b/include/asm-arm/arch-s3c2410/regs-nand.h
@@ -0,0 +1,43 @@
1/* linux/include/asm-arm/arch-s3c2410/regs-nand.h
2 *
3 * Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk>
4 * http://www.simtec.co.uk/products/SWLINUX/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * S3C2410 clock register definitions
11 *
12 * Changelog:
13 * 18-Aug-2004 BJD Copied file from 2.4 and updated
14*/
15
16#ifndef __ASM_ARM_REGS_NAND
17#define __ASM_ARM_REGS_NAND "$Id: nand.h,v 1.3 2003/12/09 11:36:29 ben Exp $"
18
19
20#define S3C2410_NFREG(x) (x)
21
22#define S3C2410_NFCONF S3C2410_NFREG(0x00)
23#define S3C2410_NFCMD S3C2410_NFREG(0x04)
24#define S3C2410_NFADDR S3C2410_NFREG(0x08)
25#define S3C2410_NFDATA S3C2410_NFREG(0x0C)
26#define S3C2410_NFSTAT S3C2410_NFREG(0x10)
27#define S3C2410_NFECC S3C2410_NFREG(0x14)
28
29#define S3C2410_NFCONF_EN (1<<15)
30#define S3C2410_NFCONF_512BYTE (1<<14)
31#define S3C2410_NFCONF_4STEP (1<<13)
32#define S3C2410_NFCONF_INITECC (1<<12)
33#define S3C2410_NFCONF_nFCE (1<<11)
34#define S3C2410_NFCONF_TACLS(x) ((x)<<8)
35#define S3C2410_NFCONF_TWRPH0(x) ((x)<<4)
36#define S3C2410_NFCONF_TWRPH1(x) ((x)<<0)
37
38#define S3C2410_NFSTAT_BUSY (1<<0)
39
40/* think ECC can only be 8bit read? */
41
42#endif /* __ASM_ARM_REGS_NAND */
43