diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-arm/arch-s3c2410/regs-iic.h |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'include/asm-arm/arch-s3c2410/regs-iic.h')
-rw-r--r-- | include/asm-arm/arch-s3c2410/regs-iic.h | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/include/asm-arm/arch-s3c2410/regs-iic.h b/include/asm-arm/arch-s3c2410/regs-iic.h new file mode 100644 index 000000000000..fed3288e2046 --- /dev/null +++ b/include/asm-arm/arch-s3c2410/regs-iic.h | |||
@@ -0,0 +1,60 @@ | |||
1 | /* linux/include/asm-arm/arch-s3c2410/regs-iic.h | ||
2 | * | ||
3 | * Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk> | ||
4 | * http://www.simtec.co.uk/products/SWLINUX/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * S3C2410 I2C Controller | ||
11 | * | ||
12 | * Changelog: | ||
13 | * 03-Oct-2004 BJD Initial include for Linux | ||
14 | * 08-Nov-2004 BJD Added S3C2440 filter register | ||
15 | */ | ||
16 | |||
17 | #ifndef __ASM_ARCH_REGS_IIC_H | ||
18 | #define __ASM_ARCH_REGS_IIC_H __FILE__ | ||
19 | |||
20 | /* see s3c2410x user guide, v1.1, section 9 (p447) for more info */ | ||
21 | |||
22 | #define S3C2410_IICREG(x) (x) | ||
23 | |||
24 | #define S3C2410_IICCON S3C2410_IICREG(0x00) | ||
25 | #define S3C2410_IICSTAT S3C2410_IICREG(0x04) | ||
26 | #define S3C2410_IICADD S3C2410_IICREG(0x08) | ||
27 | #define S3C2410_IICDS S3C2410_IICREG(0x0C) | ||
28 | #define S3C2440_IICLC S3C2410_IICREG(0x10) | ||
29 | |||
30 | #define S3C2410_IICCON_ACKEN (1<<7) | ||
31 | #define S3C2410_IICCON_TXDIV_16 (0<<6) | ||
32 | #define S3C2410_IICCON_TXDIV_512 (1<<6) | ||
33 | #define S3C2410_IICCON_IRQEN (1<<5) | ||
34 | #define S3C2410_IICCON_IRQPEND (1<<4) | ||
35 | #define S3C2410_IICCON_SCALE(x) ((x)&15) | ||
36 | #define S3C2410_IICCON_SCALEMASK (0xf) | ||
37 | |||
38 | #define S3C2410_IICSTAT_MASTER_RX (2<<6) | ||
39 | #define S3C2410_IICSTAT_MASTER_TX (3<<6) | ||
40 | #define S3C2410_IICSTAT_SLAVE_RX (0<<6) | ||
41 | #define S3C2410_IICSTAT_SLAVE_TX (1<<6) | ||
42 | #define S3C2410_IICSTAT_MODEMASK (3<<6) | ||
43 | |||
44 | #define S3C2410_IICSTAT_START (1<<5) | ||
45 | #define S3C2410_IICSTAT_BUSBUSY (1<<5) | ||
46 | #define S3C2410_IICSTAT_TXRXEN (1<<4) | ||
47 | #define S3C2410_IICSTAT_ARBITR (1<<3) | ||
48 | #define S3C2410_IICSTAT_ASSLAVE (1<<2) | ||
49 | #define S3C2410_IICSTAT_ADDR0 (1<<1) | ||
50 | #define S3C2410_IICSTAT_LASTBIT (1<<0) | ||
51 | |||
52 | #define S3C2410_IICLC_SDA_DELAY0 (0 << 0) | ||
53 | #define S3C2410_IICLC_SDA_DELAY5 (1 << 0) | ||
54 | #define S3C2410_IICLC_SDA_DELAY10 (2 << 0) | ||
55 | #define S3C2410_IICLC_SDA_DELAY15 (3 << 0) | ||
56 | #define S3C2410_IICLC_SDA_DELAY_MASK (3 << 0) | ||
57 | |||
58 | #define S3C2410_IICLC_FILTER_ON (1<<2) | ||
59 | |||
60 | #endif /* __ASM_ARCH_REGS_IIC_H */ | ||