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author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-02-03 18:50:35 -0500 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-02-03 18:50:35 -0500 |
commit | 1a56f54c351d8d2e276aefc4f4094037c178d6c7 (patch) | |
tree | 88abb7801141db3d03079bd0ef2a903cbf3a1aba /include/asm-arm/arch-s3c2410/regs-gpio.h | |
parent | d1ffa5669cd834f901141756e63195f48c1bfbf9 (diff) | |
parent | 2c4c6b27028b38204de8ade505f925d53d234422 (diff) |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
Diffstat (limited to 'include/asm-arm/arch-s3c2410/regs-gpio.h')
-rw-r--r-- | include/asm-arm/arch-s3c2410/regs-gpio.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h index 7f1be48ad67e..9697f93afe74 100644 --- a/include/asm-arm/arch-s3c2410/regs-gpio.h +++ b/include/asm-arm/arch-s3c2410/regs-gpio.h | |||
@@ -22,6 +22,7 @@ | |||
22 | * 28-Mar-2005 LCVR Fixed definition of GPB10 | 22 | * 28-Mar-2005 LCVR Fixed definition of GPB10 |
23 | * 26-Oct-2005 BJD Added generic configuration types | 23 | * 26-Oct-2005 BJD Added generic configuration types |
24 | * 27-Nov-2005 LCVR Added definitions to S3C2400 registers | 24 | * 27-Nov-2005 LCVR Added definitions to S3C2400 registers |
25 | * 15-Jan-2006 LCVR Written S3C24XX_GPIO_BASE() macro | ||
25 | */ | 26 | */ |
26 | 27 | ||
27 | 28 | ||
@@ -39,6 +40,27 @@ | |||
39 | #define S3C2410_GPIO_BANKG (32*6) | 40 | #define S3C2410_GPIO_BANKG (32*6) |
40 | #define S3C2410_GPIO_BANKH (32*7) | 41 | #define S3C2410_GPIO_BANKH (32*7) |
41 | 42 | ||
43 | #ifdef CONFIG_CPU_S3C2400 | ||
44 | #define S3C24XX_GPIO_BASE(x) S3C2400_GPIO_BASE(x) | ||
45 | #define S3C24XX_MISCCR S3C2400_MISCCR | ||
46 | #else | ||
47 | #define S3C24XX_GPIO_BASE(x) S3C2410_GPIO_BASE(x) | ||
48 | #define S3C24XX_MISCCR S3C2410_MISCCR | ||
49 | #endif /* CONFIG_CPU_S3C2400 */ | ||
50 | |||
51 | |||
52 | /* S3C2400 doesn't have a 1:1 mapping to S3C2410 gpio base pins */ | ||
53 | |||
54 | #define S3C2400_BANKNUM(pin) (((pin) & ~31) / 32) | ||
55 | #define S3C2400_BASEA2B(pin) ((((pin) & ~31) >> 2)) | ||
56 | #define S3C2400_BASEC2H(pin) ((S3C2400_BANKNUM(pin) * 10) + \ | ||
57 | (2 * (S3C2400_BANKNUM(pin)-2))) | ||
58 | |||
59 | #define S3C2400_GPIO_BASE(pin) (pin < S3C2410_GPIO_BANKC ? \ | ||
60 | S3C2400_BASEA2B(pin)+S3C24XX_VA_GPIO : \ | ||
61 | S3C2400_BASEC2H(pin)+S3C24XX_VA_GPIO) | ||
62 | |||
63 | |||
42 | #define S3C2410_GPIO_BASE(pin) ((((pin) & ~31) >> 1) + S3C24XX_VA_GPIO) | 64 | #define S3C2410_GPIO_BASE(pin) ((((pin) & ~31) >> 1) + S3C24XX_VA_GPIO) |
43 | #define S3C2410_GPIO_OFFSET(pin) ((pin) & 31) | 65 | #define S3C2410_GPIO_OFFSET(pin) ((pin) & 31) |
44 | 66 | ||