[ARM] 4517/1: S3C: Fix debug macros for ARM926 output

Check for ARM926 based S3C24XX based devices as these
only have 64 byte FIFOs, and do not have the model
detection refisters in the same place as the ARM920
based CPUs

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 7 insertions, 0 deletions

diff --git a/include/asm-arm/arch-s3c2410/debug-macro.S b/include/asm-arm/arch-s3c2410/debug-macro.S
index c37d3474179b..9c8cd9abb82b 100644
--- a/include/asm-arm/arch-s3c2410/debug-macro.S
+++ b/include/asm-arm/arch-s3c2410/debug-macro.S
@@ -58,6 +58,12 @@
 /* fifo level reading */
 
         .macro fifo_level_s3c24xx rd, rx
+                @ check for arm920 vs arm926. currently assume all arm926
+                @ devices have an 64 byte FIFO identical to the s3c2440
+                mrc     p15, 0, \rd, c0, c0
+                and     \rd, \rd, #0xff0
+                teq     \rd, #0x260
+                beq     10000f
                 mrc     p15, 0, \rd, c1, c0
                 tst     \rd, #1
                 addeq   \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
@@ -67,6 +73,7 @@
                 and     \rd, \rd, #0x00ff0000
                 teq     \rd, #0x00440000                @ is it 2440?
 
+10000:
                 ldr     \rd, [ \rx, # S3C2410_UFSTAT ]
                 andne   \rd, \rd, #S3C2410_UFSTAT_TXMASK
                 andeq   \rd, \rd, #S3C2440_UFSTAT_TXMASK