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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2007-02-15 10:07:40 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-15 10:07:40 -0500
commit4ba9dcbeba042b7a1a1366f0dc683a2947ca5577 (patch)
treea99a7e26eb4c30a477d70b035b5a90f2dfd45566 /include/asm-arm/arch-realview
parent382266ad5ad4119ec12df889afa5062a0a0cd6ae (diff)
parent4b17244c133689ad0cbdca37ce3e15068f120428 (diff)
Merge Realview GIC code
Diffstat (limited to 'include/asm-arm/arch-realview')
-rw-r--r--include/asm-arm/arch-realview/hardware.h2
-rw-r--r--include/asm-arm/arch-realview/irqs.h5
-rw-r--r--include/asm-arm/arch-realview/platform.h16
-rw-r--r--include/asm-arm/arch-realview/scu.h8
4 files changed, 29 insertions, 2 deletions
diff --git a/include/asm-arm/arch-realview/hardware.h b/include/asm-arm/arch-realview/hardware.h
index 9ca76dc3a7af..aa78fe087ab2 100644
--- a/include/asm-arm/arch-realview/hardware.h
+++ b/include/asm-arm/arch-realview/hardware.h
@@ -26,7 +26,7 @@
26#include <asm/arch/platform.h> 26#include <asm/arch/platform.h>
27 27
28/* macro to get at IO space when running virtually */ 28/* macro to get at IO space when running virtually */
29#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) 29#define IO_ADDRESS(x) ((((x) & 0x0effffff) | (((x) >> 4) & 0x0f000000)) + 0xf0000000)
30#define __io_address(n) __io(IO_ADDRESS(n)) 30#define __io_address(n) __io(IO_ADDRESS(n))
31 31
32#endif 32#endif
diff --git a/include/asm-arm/arch-realview/irqs.h b/include/asm-arm/arch-realview/irqs.h
index 76b498eb20a6..5a5db56f86b8 100644
--- a/include/asm-arm/arch-realview/irqs.h
+++ b/include/asm-arm/arch-realview/irqs.h
@@ -78,6 +78,9 @@
78#define IRQ_PMU_SCU6 (IRQ_GIC_START + INT_PMU_SCU6) 78#define IRQ_PMU_SCU6 (IRQ_GIC_START + INT_PMU_SCU6)
79#define IRQ_PMU_SCU7 (IRQ_GIC_START + INT_PMU_SCU7) 79#define IRQ_PMU_SCU7 (IRQ_GIC_START + INT_PMU_SCU7)
80 80
81#define IRQ_EB_IRQ1 (IRQ_GIC_START + INT_EB_IRQ1)
82#define IRQ_EB_IRQ2 (IRQ_GIC_START + INT_EB_IRQ2)
83
81#define IRQMASK_WDOGINT INTMASK_WDOGINT 84#define IRQMASK_WDOGINT INTMASK_WDOGINT
82#define IRQMASK_SOFTINT INTMASK_SOFTINT 85#define IRQMASK_SOFTINT INTMASK_SOFTINT
83#define IRQMASK_COMMRx INTMASK_COMMRx 86#define IRQMASK_COMMRx INTMASK_COMMRx
@@ -115,4 +118,4 @@
115#define IRQMASK_ETH INTMASK_ETH 118#define IRQMASK_ETH INTMASK_ETH
116#define IRQMASK_USB INTMASK_USB 119#define IRQMASK_USB INTMASK_USB
117 120
118#define NR_IRQS (IRQ_GIC_START + 64) 121#define NR_IRQS (IRQ_GIC_START + 96)
diff --git a/include/asm-arm/arch-realview/platform.h b/include/asm-arm/arch-realview/platform.h
index 18d7c18b738c..87acd9c191e6 100644
--- a/include/asm-arm/arch-realview/platform.h
+++ b/include/asm-arm/arch-realview/platform.h
@@ -207,11 +207,23 @@
207#define REALVIEW_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */ 207#define REALVIEW_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */
208#define REALVIEW_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */ 208#define REALVIEW_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */
209#else 209#else
210#ifdef CONFIG_REALVIEW_MPCORE_REVB
210#define REALVIEW_MPCORE_SCU_BASE 0x10100000 /* SCU registers */ 211#define REALVIEW_MPCORE_SCU_BASE 0x10100000 /* SCU registers */
211#define REALVIEW_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */ 212#define REALVIEW_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */
212#define REALVIEW_TWD_BASE 0x10100700 213#define REALVIEW_TWD_BASE 0x10100700
213#define REALVIEW_TWD_SIZE 0x00000100 214#define REALVIEW_TWD_SIZE 0x00000100
214#define REALVIEW_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */ 215#define REALVIEW_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */
216#define REALVIEW_MPCORE_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */
217#else
218#define REALVIEW_MPCORE_SCU_BASE 0x1F000000 /* SCU registers */
219#define REALVIEW_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */
220#define REALVIEW_TWD_BASE 0x1F000700
221#define REALVIEW_TWD_SIZE 0x00000100
222#define REALVIEW_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */
223#define REALVIEW_MPCORE_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
224#endif
225#define REALVIEW_GIC1_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */
226#define REALVIEW_GIC1_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */
215#endif 227#endif
216#define REALVIEW_SMC_BASE 0x10080000 /* SMC */ 228#define REALVIEW_SMC_BASE 0x10080000 /* SMC */
217 /* Reserved 0x10090000 - 0x100EFFFF */ 229 /* Reserved 0x10090000 - 0x100EFFFF */
@@ -306,7 +318,11 @@
306#define INT_USB 29 /* USB controller */ 318#define INT_USB 29 /* USB controller */
307#define INT_TSPENINT 30 /* Touchscreen pen */ 319#define INT_TSPENINT 30 /* Touchscreen pen */
308#define INT_TSKPADINT 31 /* Touchscreen keypad */ 320#define INT_TSKPADINT 31 /* Touchscreen keypad */
321
309#else 322#else
323
324#define MAX_GIC_NR 2
325
310#define INT_AACI 0 326#define INT_AACI 0
311#define INT_TIMERINT0_1 1 327#define INT_TIMERINT0_1 1
312#define INT_TIMERINT2_3 2 328#define INT_TIMERINT2_3 2
diff --git a/include/asm-arm/arch-realview/scu.h b/include/asm-arm/arch-realview/scu.h
new file mode 100644
index 000000000000..cc293640178e
--- /dev/null
+++ b/include/asm-arm/arch-realview/scu.h
@@ -0,0 +1,8 @@
1#ifndef __ASMARM_ARCH_SCU_H
2#define __ASMARM_ARCH_SCU_H
3
4#include <asm/arch/platform.h>
5
6#define SCU_BASE REALVIEW_MPCORE_SCU_BASE
7
8#endif