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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-08-05 11:14:15 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-08-07 04:55:48 -0400
commita09e64fbc0094e3073dbb09c3b4bfe4ab669244b (patch)
tree69689f467179891b498bd7423fcf61925173db31 /include/asm-arm/arch-realview
parenta1b81a84fff05dbfef45b7012c26e1fee9973e5d (diff)
[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-realview')
-rw-r--r--include/asm-arm/arch-realview/board-eb.h191
-rw-r--r--include/asm-arm/arch-realview/board-pb1176.h152
-rw-r--r--include/asm-arm/arch-realview/board-pb11mp.h186
-rw-r--r--include/asm-arm/arch-realview/debug-macro.S22
-rw-r--r--include/asm-arm/arch-realview/dma.h20
-rw-r--r--include/asm-arm/arch-realview/entry-macro.S81
-rw-r--r--include/asm-arm/arch-realview/hardware.h31
-rw-r--r--include/asm-arm/arch-realview/io.h33
-rw-r--r--include/asm-arm/arch-realview/irqs.h38
-rw-r--r--include/asm-arm/arch-realview/memory.h38
-rw-r--r--include/asm-arm/arch-realview/platform.h293
-rw-r--r--include/asm-arm/arch-realview/scu.h13
-rw-r--r--include/asm-arm/arch-realview/smp.h30
-rw-r--r--include/asm-arm/arch-realview/system.h51
-rw-r--r--include/asm-arm/arch-realview/timex.h23
-rw-r--r--include/asm-arm/arch-realview/uncompress.h72
-rw-r--r--include/asm-arm/arch-realview/vmalloc.h21
17 files changed, 0 insertions, 1295 deletions
diff --git a/include/asm-arm/arch-realview/board-eb.h b/include/asm-arm/arch-realview/board-eb.h
deleted file mode 100644
index 206f7a752882..000000000000
--- a/include/asm-arm/arch-realview/board-eb.h
+++ /dev/null
@@ -1,191 +0,0 @@
1/*
2 * include/asm-arm/arch-realview/board-eb.h
3 *
4 * Copyright (C) 2007 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#ifndef __ASM_ARCH_BOARD_EB_H
22#define __ASM_ARCH_BOARD_EB_H
23
24#include <asm/arch/platform.h>
25
26/*
27 * RealView EB + ARM11MPCore peripheral addresses
28 */
29#define REALVIEW_EB_UART0_BASE 0x10009000 /* UART 0 */
30#define REALVIEW_EB_UART1_BASE 0x1000A000 /* UART 1 */
31#define REALVIEW_EB_UART2_BASE 0x1000B000 /* UART 2 */
32#define REALVIEW_EB_UART3_BASE 0x1000C000 /* UART 3 */
33#define REALVIEW_EB_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
34#define REALVIEW_EB_WATCHDOG_BASE 0x10010000 /* watchdog interface */
35#define REALVIEW_EB_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
36#define REALVIEW_EB_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
37#define REALVIEW_EB_GPIO0_BASE 0x10013000 /* GPIO port 0 */
38#define REALVIEW_EB_RTC_BASE 0x10017000 /* Real Time Clock */
39#define REALVIEW_EB_CLCD_BASE 0x10020000 /* CLCD */
40#define REALVIEW_EB_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */
41#define REALVIEW_EB_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */
42#define REALVIEW_EB_SMC_BASE 0x10080000 /* Static memory controller */
43
44#define REALVIEW_EB_FLASH_BASE 0x40000000
45#define REALVIEW_EB_FLASH_SIZE SZ_64M
46#define REALVIEW_EB_ETH_BASE 0x4E000000 /* Ethernet */
47#define REALVIEW_EB_USB_BASE 0x4F000000 /* USB */
48
49#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
50#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */
51#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */
52#define REALVIEW_EB11MP_TWD_BASE 0x10100700
53#define REALVIEW_EB11MP_TWD_SIZE 0x00000100
54#define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */
55#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */
56#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */
57#else
58#define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */
59#define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */
60#define REALVIEW_EB11MP_TWD_BASE 0x1F000700
61#define REALVIEW_EB11MP_TWD_SIZE 0x00000100
62#define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */
63#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */
64#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
65#endif
66
67#define IRQ_EB_GIC_START 32
68
69/*
70 * RealView EB interrupt sources
71 */
72#define IRQ_EB_WDOG (IRQ_EB_GIC_START + 0) /* Watchdog timer */
73#define IRQ_EB_SOFT (IRQ_EB_GIC_START + 1) /* Software interrupt */
74#define IRQ_EB_COMMRx (IRQ_EB_GIC_START + 2) /* Debug Comm Rx interrupt */
75#define IRQ_EB_COMMTx (IRQ_EB_GIC_START + 3) /* Debug Comm Tx interrupt */
76#define IRQ_EB_TIMER0_1 (IRQ_EB_GIC_START + 4) /* Timer 0 and 1 */
77#define IRQ_EB_TIMER2_3 (IRQ_EB_GIC_START + 5) /* Timer 2 and 3 */
78#define IRQ_EB_GPIO0 (IRQ_EB_GIC_START + 6) /* GPIO 0 */
79#define IRQ_EB_GPIO1 (IRQ_EB_GIC_START + 7) /* GPIO 1 */
80#define IRQ_EB_GPIO2 (IRQ_EB_GIC_START + 8) /* GPIO 2 */
81 /* 9 reserved */
82#define IRQ_EB_RTC (IRQ_EB_GIC_START + 10) /* Real Time Clock */
83#define IRQ_EB_SSP (IRQ_EB_GIC_START + 11) /* Synchronous Serial Port */
84#define IRQ_EB_UART0 (IRQ_EB_GIC_START + 12) /* UART 0 on development chip */
85#define IRQ_EB_UART1 (IRQ_EB_GIC_START + 13) /* UART 1 on development chip */
86#define IRQ_EB_UART2 (IRQ_EB_GIC_START + 14) /* UART 2 on development chip */
87#define IRQ_EB_UART3 (IRQ_EB_GIC_START + 15) /* UART 3 on development chip */
88#define IRQ_EB_SCI (IRQ_EB_GIC_START + 16) /* Smart Card Interface */
89#define IRQ_EB_MMCI0A (IRQ_EB_GIC_START + 17) /* Multimedia Card 0A */
90#define IRQ_EB_MMCI0B (IRQ_EB_GIC_START + 18) /* Multimedia Card 0B */
91#define IRQ_EB_AACI (IRQ_EB_GIC_START + 19) /* Audio Codec */
92#define IRQ_EB_KMI0 (IRQ_EB_GIC_START + 20) /* Keyboard/Mouse port 0 */
93#define IRQ_EB_KMI1 (IRQ_EB_GIC_START + 21) /* Keyboard/Mouse port 1 */
94#define IRQ_EB_CHARLCD (IRQ_EB_GIC_START + 22) /* Character LCD */
95#define IRQ_EB_CLCD (IRQ_EB_GIC_START + 23) /* CLCD controller */
96#define IRQ_EB_DMA (IRQ_EB_GIC_START + 24) /* DMA controller */
97#define IRQ_EB_PWRFAIL (IRQ_EB_GIC_START + 25) /* Power failure */
98#define IRQ_EB_PISMO (IRQ_EB_GIC_START + 26) /* PISMO interface */
99#define IRQ_EB_DoC (IRQ_EB_GIC_START + 27) /* Disk on Chip memory controller */
100#define IRQ_EB_ETH (IRQ_EB_GIC_START + 28) /* Ethernet controller */
101#define IRQ_EB_USB (IRQ_EB_GIC_START + 29) /* USB controller */
102#define IRQ_EB_TSPEN (IRQ_EB_GIC_START + 30) /* Touchscreen pen */
103#define IRQ_EB_TSKPAD (IRQ_EB_GIC_START + 31) /* Touchscreen keypad */
104
105/*
106 * RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile)
107 */
108#define IRQ_EB11MP_AACI (IRQ_EB_GIC_START + 0)
109#define IRQ_EB11MP_TIMER0_1 (IRQ_EB_GIC_START + 1)
110#define IRQ_EB11MP_TIMER2_3 (IRQ_EB_GIC_START + 2)
111#define IRQ_EB11MP_USB (IRQ_EB_GIC_START + 3)
112#define IRQ_EB11MP_UART0 (IRQ_EB_GIC_START + 4)
113#define IRQ_EB11MP_UART1 (IRQ_EB_GIC_START + 5)
114#define IRQ_EB11MP_RTC (IRQ_EB_GIC_START + 6)
115#define IRQ_EB11MP_KMI0 (IRQ_EB_GIC_START + 7)
116#define IRQ_EB11MP_KMI1 (IRQ_EB_GIC_START + 8)
117#define IRQ_EB11MP_ETH (IRQ_EB_GIC_START + 9)
118#define IRQ_EB11MP_EB_IRQ1 (IRQ_EB_GIC_START + 10) /* main GIC */
119#define IRQ_EB11MP_EB_IRQ2 (IRQ_EB_GIC_START + 11) /* tile GIC */
120#define IRQ_EB11MP_EB_FIQ1 (IRQ_EB_GIC_START + 12) /* main GIC */
121#define IRQ_EB11MP_EB_FIQ2 (IRQ_EB_GIC_START + 13) /* tile GIC */
122#define IRQ_EB11MP_MMCI0A (IRQ_EB_GIC_START + 14)
123#define IRQ_EB11MP_MMCI0B (IRQ_EB_GIC_START + 15)
124
125#define IRQ_EB11MP_PMU_CPU0 (IRQ_EB_GIC_START + 17)
126#define IRQ_EB11MP_PMU_CPU1 (IRQ_EB_GIC_START + 18)
127#define IRQ_EB11MP_PMU_CPU2 (IRQ_EB_GIC_START + 19)
128#define IRQ_EB11MP_PMU_CPU3 (IRQ_EB_GIC_START + 20)
129#define IRQ_EB11MP_PMU_SCU0 (IRQ_EB_GIC_START + 21)
130#define IRQ_EB11MP_PMU_SCU1 (IRQ_EB_GIC_START + 22)
131#define IRQ_EB11MP_PMU_SCU2 (IRQ_EB_GIC_START + 23)
132#define IRQ_EB11MP_PMU_SCU3 (IRQ_EB_GIC_START + 24)
133#define IRQ_EB11MP_PMU_SCU4 (IRQ_EB_GIC_START + 25)
134#define IRQ_EB11MP_PMU_SCU5 (IRQ_EB_GIC_START + 26)
135#define IRQ_EB11MP_PMU_SCU6 (IRQ_EB_GIC_START + 27)
136#define IRQ_EB11MP_PMU_SCU7 (IRQ_EB_GIC_START + 28)
137
138#define IRQ_EB11MP_L220_EVENT (IRQ_EB_GIC_START + 29)
139#define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30)
140#define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31)
141
142#define IRQ_EB11MP_UART2 -1
143#define IRQ_EB11MP_UART3 -1
144#define IRQ_EB11MP_CLCD -1
145#define IRQ_EB11MP_DMA -1
146#define IRQ_EB11MP_WDOG -1
147#define IRQ_EB11MP_GPIO0 -1
148#define IRQ_EB11MP_GPIO1 -1
149#define IRQ_EB11MP_GPIO2 -1
150#define IRQ_EB11MP_SCI -1
151#define IRQ_EB11MP_SSP -1
152
153#define NR_GIC_EB11MP 2
154
155/*
156 * Only define NR_IRQS if less than NR_IRQS_EB
157 */
158#define NR_IRQS_EB (IRQ_EB_GIC_START + 96)
159
160#if defined(CONFIG_MACH_REALVIEW_EB) \
161 && (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB))
162#undef NR_IRQS
163#define NR_IRQS NR_IRQS_EB
164#endif
165
166#if defined(CONFIG_REALVIEW_EB_ARM11MP) \
167 && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
168#undef MAX_GIC_NR
169#define MAX_GIC_NR NR_GIC_EB11MP
170#endif
171
172/*
173 * Core tile identification (REALVIEW_SYS_PROCID)
174 */
175#define REALVIEW_EB_PROC_MASK 0xFF000000
176#define REALVIEW_EB_PROC_ARM7TDMI 0x00000000
177#define REALVIEW_EB_PROC_ARM9 0x02000000
178#define REALVIEW_EB_PROC_ARM11 0x04000000
179#define REALVIEW_EB_PROC_ARM11MP 0x06000000
180
181#define check_eb_proc(proc_type) \
182 ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \
183 == proc_type)
184
185#ifdef CONFIG_REALVIEW_EB_ARM11MP
186#define core_tile_eb11mp() check_eb_proc(REALVIEW_EB_PROC_ARM11MP)
187#else
188#define core_tile_eb11mp() 0
189#endif
190
191#endif /* __ASM_ARCH_BOARD_EB_H */
diff --git a/include/asm-arm/arch-realview/board-pb1176.h b/include/asm-arm/arch-realview/board-pb1176.h
deleted file mode 100644
index 48ce9c833705..000000000000
--- a/include/asm-arm/arch-realview/board-pb1176.h
+++ /dev/null
@@ -1,152 +0,0 @@
1/*
2 * include/asm-arm/arch-realview/board-pb1176.h
3 *
4 * Copyright (C) 2008 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#ifndef __ASM_ARCH_BOARD_PB1176_H
22#define __ASM_ARCH_BOARD_PB1176_H
23
24#include <asm/arch/platform.h>
25
26/*
27 * Peripheral addresses
28 */
29#define REALVIEW_PB1176_SCTL_BASE 0x10100000 /* System controller */
30#define REALVIEW_PB1176_SMC_BASE 0x10111000 /* SMC */
31#define REALVIEW_PB1176_DMC_BASE 0x10109000 /* DMC configuration */
32#define REALVIEW_PB1176_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */
33#define REALVIEW_PB1176_FLASH_BASE 0x30000000
34#define REALVIEW_PB1176_FLASH_SIZE SZ_64M
35
36#define REALVIEW_PB1176_TIMER0_1_BASE 0x10104000 /* Timer 0 and 1 */
37#define REALVIEW_PB1176_TIMER2_3_BASE 0x10105000 /* Timer 2 and 3 */
38#define REALVIEW_PB1176_TIMER4_5_BASE 0x10106000 /* Timer 4 and 5 */
39#define REALVIEW_PB1176_WATCHDOG_BASE 0x10107000 /* watchdog interface */
40#define REALVIEW_PB1176_RTC_BASE 0x10108000 /* Real Time Clock */
41#define REALVIEW_PB1176_GPIO0_BASE 0x1010A000 /* GPIO port 0 */
42#define REALVIEW_PB1176_SSP_BASE 0x1010B000 /* Synchronous Serial Port */
43#define REALVIEW_PB1176_UART0_BASE 0x1010C000 /* UART 0 */
44#define REALVIEW_PB1176_UART1_BASE 0x1010D000 /* UART 1 */
45#define REALVIEW_PB1176_UART2_BASE 0x1010E000 /* UART 2 */
46#define REALVIEW_PB1176_UART3_BASE 0x1010F000 /* UART 3 */
47#define REALVIEW_PB1176_CLCD_BASE 0x10112000 /* CLCD */
48#define REALVIEW_PB1176_ETH_BASE 0x3A000000 /* Ethernet */
49#define REALVIEW_PB1176_USB_BASE 0x3B000000 /* USB */
50
51/*
52 * PCI regions
53 */
54#define REALVIEW_PB1176_PCI_BASE 0x60000000 /* PCI self config */
55#define REALVIEW_PB1176_PCI_CFG_BASE 0x61000000 /* PCI config */
56#define REALVIEW_PB1176_PCI_IO_BASE0 0x62000000 /* PCI IO region */
57#define REALVIEW_PB1176_PCI_MEM_BASE0 0x63000000 /* Memory region 1 */
58#define REALVIEW_PB1176_PCI_MEM_BASE1 0x64000000 /* Memory region 2 */
59#define REALVIEW_PB1176_PCI_MEM_BASE2 0x68000000 /* Memory region 3 */
60
61#define REALVIEW_PB1176_PCI_BASE_SIZE 0x01000000 /* 16MB */
62#define REALVIEW_PB1176_PCI_CFG_BASE_SIZE 0x01000000 /* 16MB */
63#define REALVIEW_PB1176_PCI_IO_BASE0_SIZE 0x01000000 /* 16MB */
64#define REALVIEW_PB1176_PCI_MEM_BASE0_SIZE 0x01000000 /* 16MB */
65#define REALVIEW_PB1176_PCI_MEM_BASE1_SIZE 0x04000000 /* 64MB */
66#define REALVIEW_PB1176_PCI_MEM_BASE2_SIZE 0x08000000 /* 128MB */
67
68#define REALVIEW_DC1176_GIC_CPU_BASE 0x10120000 /* GIC CPU interface, on devchip */
69#define REALVIEW_DC1176_GIC_DIST_BASE 0x10121000 /* GIC distributor, on devchip */
70#define REALVIEW_PB1176_GIC_CPU_BASE 0x10040000 /* GIC CPU interface, on FPGA */
71#define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */
72#define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */
73
74/*
75 * Irqs
76 */
77#define IRQ_DC1176_GIC_START 32
78#define IRQ_PB1176_GIC_START 64
79
80/*
81 * ARM1176 DevChip interrupt sources (primary GIC)
82 */
83#define IRQ_DC1176_WATCHDOG (IRQ_DC1176_GIC_START + 0) /* Watchdog timer */
84#define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */
85#define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */
86#define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */
87#define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */
88#define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */
89#define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */
90#define IRQ_DC1176_APC (IRQ_DC1176_GIC_START + 11)
91#define IRQ_DC1176_IEC (IRQ_DC1176_GIC_START + 12)
92#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13)
93#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14)
94#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */
95#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */
96#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */
97#define IRQ_DC1176_UART2 (IRQ_DC1176_GIC_START + 20) /* UART 2 on development chip */
98#define IRQ_DC1176_UART3 (IRQ_DC1176_GIC_START + 21) /* UART 3 on development chip */
99
100#define IRQ_DC1176_PB_IRQ2 (IRQ_DC1176_GIC_START + 30) /* tile GIC */
101#define IRQ_DC1176_PB_IRQ1 (IRQ_DC1176_GIC_START + 31) /* main GIC */
102
103/*
104 * RealView PB1176 interrupt sources (secondary GIC)
105 */
106#define IRQ_PB1176_MMCI0A (IRQ_PB1176_GIC_START + 1) /* Multimedia Card 0A */
107#define IRQ_PB1176_MMCI0B (IRQ_PB1176_GIC_START + 2) /* Multimedia Card 0A */
108#define IRQ_PB1176_KMI0 (IRQ_PB1176_GIC_START + 3) /* Keyboard/Mouse port 0 */
109#define IRQ_PB1176_KMI1 (IRQ_PB1176_GIC_START + 4) /* Keyboard/Mouse port 1 */
110#define IRQ_PB1176_SCI (IRQ_PB1176_GIC_START + 5)
111#define IRQ_PB1176_UART4 (IRQ_PB1176_GIC_START + 6) /* UART 4 on baseboard */
112#define IRQ_PB1176_CHARLCD (IRQ_PB1176_GIC_START + 7) /* Character LCD */
113#define IRQ_PB1176_GPIO1 (IRQ_PB1176_GIC_START + 8)
114#define IRQ_PB1176_GPIO2 (IRQ_PB1176_GIC_START + 9)
115#define IRQ_PB1176_ETH (IRQ_PB1176_GIC_START + 10) /* Ethernet controller */
116#define IRQ_PB1176_USB (IRQ_PB1176_GIC_START + 11) /* USB controller */
117
118#define IRQ_PB1176_PISMO (IRQ_PB1176_GIC_START + 16)
119
120#define IRQ_PB1176_AACI (IRQ_PB1176_GIC_START + 19) /* Audio Codec */
121
122#define IRQ_PB1176_TIMER0_1 (IRQ_PB1176_GIC_START + 22)
123#define IRQ_PB1176_TIMER2_3 (IRQ_PB1176_GIC_START + 23)
124#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */
125#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */
126
127#define IRQ_PB1176_GPIO0 -1
128#define IRQ_PB1176_SSP -1
129#define IRQ_PB1176_SCTL -1
130
131#define NR_GIC_PB1176 2
132
133/*
134 * Only define NR_IRQS if less than NR_IRQS_PB1176
135 */
136#define NR_IRQS_PB1176 (IRQ_DC1176_GIC_START + 96)
137
138#if defined(CONFIG_MACH_REALVIEW_PB1176)
139
140#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB1176)
141#undef NR_IRQS
142#define NR_IRQS NR_IRQS_PB1176
143#endif
144
145#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB1176)
146#undef MAX_GIC_NR
147#define MAX_GIC_NR NR_GIC_PB1176
148#endif
149
150#endif /* CONFIG_MACH_REALVIEW_PB1176 */
151
152#endif /* __ASM_ARCH_BOARD_PB1176_H */
diff --git a/include/asm-arm/arch-realview/board-pb11mp.h b/include/asm-arm/arch-realview/board-pb11mp.h
deleted file mode 100644
index a1294d915fa8..000000000000
--- a/include/asm-arm/arch-realview/board-pb11mp.h
+++ /dev/null
@@ -1,186 +0,0 @@
1/*
2 * include/asm-arm/arch-realview/board-pb11mp.h
3 *
4 * Copyright (C) 2008 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#ifndef __ASM_ARCH_BOARD_PB11MP_H
22#define __ASM_ARCH_BOARD_PB11MP_H
23
24#include <asm/arch/platform.h>
25
26/*
27 * Peripheral addresses
28 */
29#define REALVIEW_PB11MP_UART0_BASE 0x10009000 /* UART 0 */
30#define REALVIEW_PB11MP_UART1_BASE 0x1000A000 /* UART 1 */
31#define REALVIEW_PB11MP_UART2_BASE 0x1000B000 /* UART 2 */
32#define REALVIEW_PB11MP_UART3_BASE 0x1000C000 /* UART 3 */
33#define REALVIEW_PB11MP_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
34#define REALVIEW_PB11MP_WATCHDOG0_BASE 0x1000F000 /* Watchdog 0 */
35#define REALVIEW_PB11MP_WATCHDOG_BASE 0x10010000 /* watchdog interface */
36#define REALVIEW_PB11MP_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
37#define REALVIEW_PB11MP_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
38#define REALVIEW_PB11MP_GPIO0_BASE 0x10013000 /* GPIO port 0 */
39#define REALVIEW_PB11MP_RTC_BASE 0x10017000 /* Real Time Clock */
40#define REALVIEW_PB11MP_TIMER4_5_BASE 0x10018000 /* Timer 4/5 */
41#define REALVIEW_PB11MP_TIMER6_7_BASE 0x10019000 /* Timer 6/7 */
42#define REALVIEW_PB11MP_SCTL_BASE 0x1001A000 /* System Controller */
43#define REALVIEW_PB11MP_CLCD_BASE 0x10020000 /* CLCD */
44#define REALVIEW_PB11MP_ONB_SRAM_BASE 0x10060000 /* On-board SRAM */
45#define REALVIEW_PB11MP_DMC_BASE 0x100E0000 /* DMC configuration */
46#define REALVIEW_PB11MP_SMC_BASE 0x100E1000 /* SMC configuration */
47#define REALVIEW_PB11MP_CAN_BASE 0x100E2000 /* CAN bus */
48#define REALVIEW_PB11MP_CF_BASE 0x18000000 /* Compact flash */
49#define REALVIEW_PB11MP_CF_MEM_BASE 0x18003000 /* SMC for Compact flash */
50#define REALVIEW_PB11MP_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */
51#define REALVIEW_PB11MP_FLASH0_BASE 0x40000000
52#define REALVIEW_PB11MP_FLASH0_SIZE SZ_64M
53#define REALVIEW_PB11MP_FLASH1_BASE 0x44000000
54#define REALVIEW_PB11MP_FLASH1_SIZE SZ_64M
55#define REALVIEW_PB11MP_ETH_BASE 0x4E000000 /* Ethernet */
56#define REALVIEW_PB11MP_USB_BASE 0x4F000000 /* USB */
57#define REALVIEW_PB11MP_GIC_DIST_BASE 0x1E001000 /* Generic interrupt controller distributor */
58#define REALVIEW_PB11MP_LT_BASE 0xC0000000 /* Logic Tile expansion */
59#define REALVIEW_PB11MP_SDRAM6_BASE 0x70000000 /* SDRAM bank 6 256MB */
60#define REALVIEW_PB11MP_SDRAM7_BASE 0x80000000 /* SDRAM bank 7 256MB */
61
62#define REALVIEW_PB11MP_SYS_PLD_CTRL1 0x74
63
64/*
65 * PB11MPCore PCI regions
66 */
67#define REALVIEW_PB11MP_PCI_BASE 0x90040000 /* PCI-X Unit base */
68#define REALVIEW_PB11MP_PCI_IO_BASE 0x90050000 /* IO Region on AHB */
69#define REALVIEW_PB11MP_PCI_MEM_BASE 0xA0000000 /* MEM Region on AHB */
70
71#define REALVIEW_PB11MP_PCI_BASE_SIZE 0x10000 /* 16 Kb */
72#define REALVIEW_PB11MP_PCI_IO_SIZE 0x1000 /* 4 Kb */
73#define REALVIEW_PB11MP_PCI_MEM_SIZE 0x20000000 /* 512 MB */
74
75/*
76 * Testchip peripheral and fpga gic regions
77 */
78#define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */
79#define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */
80#define REALVIEW_TC11MP_TWD_BASE 0x1F000700
81#define REALVIEW_TC11MP_TWD_SIZE 0x00000100
82#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */
83#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */
84
85/*
86 * Irqs
87 */
88#define IRQ_TC11MP_GIC_START 32
89#define IRQ_PB11MP_GIC_START 64
90
91/*
92 * ARM11MPCore test chip interrupt sources (primary GIC on the test chip)
93 */
94#define IRQ_TC11MP_AACI (IRQ_TC11MP_GIC_START + 0)
95#define IRQ_TC11MP_TIMER0_1 (IRQ_TC11MP_GIC_START + 1)
96#define IRQ_TC11MP_TIMER2_3 (IRQ_TC11MP_GIC_START + 2)
97#define IRQ_TC11MP_USB (IRQ_TC11MP_GIC_START + 3)
98#define IRQ_TC11MP_UART0 (IRQ_TC11MP_GIC_START + 4)
99#define IRQ_TC11MP_UART1 (IRQ_TC11MP_GIC_START + 5)
100#define IRQ_TC11MP_RTC (IRQ_TC11MP_GIC_START + 6)
101#define IRQ_TC11MP_KMI0 (IRQ_TC11MP_GIC_START + 7)
102#define IRQ_TC11MP_KMI1 (IRQ_TC11MP_GIC_START + 8)
103#define IRQ_TC11MP_ETH (IRQ_TC11MP_GIC_START + 9)
104#define IRQ_TC11MP_PB_IRQ1 (IRQ_TC11MP_GIC_START + 10) /* main GIC */
105#define IRQ_TC11MP_PB_IRQ2 (IRQ_TC11MP_GIC_START + 11) /* tile GIC */
106#define IRQ_TC11MP_PB_FIQ1 (IRQ_TC11MP_GIC_START + 12) /* main GIC */
107#define IRQ_TC11MP_PB_FIQ2 (IRQ_TC11MP_GIC_START + 13) /* tile GIC */
108#define IRQ_TC11MP_MMCI0A (IRQ_TC11MP_GIC_START + 14)
109#define IRQ_TC11MP_MMCI0B (IRQ_TC11MP_GIC_START + 15)
110
111#define IRQ_TC11MP_PMU_CPU0 (IRQ_TC11MP_GIC_START + 17)
112#define IRQ_TC11MP_PMU_CPU1 (IRQ_TC11MP_GIC_START + 18)
113#define IRQ_TC11MP_PMU_CPU2 (IRQ_TC11MP_GIC_START + 19)
114#define IRQ_TC11MP_PMU_CPU3 (IRQ_TC11MP_GIC_START + 20)
115#define IRQ_TC11MP_PMU_SCU0 (IRQ_TC11MP_GIC_START + 21)
116#define IRQ_TC11MP_PMU_SCU1 (IRQ_TC11MP_GIC_START + 22)
117#define IRQ_TC11MP_PMU_SCU2 (IRQ_TC11MP_GIC_START + 23)
118#define IRQ_TC11MP_PMU_SCU3 (IRQ_TC11MP_GIC_START + 24)
119#define IRQ_TC11MP_PMU_SCU4 (IRQ_TC11MP_GIC_START + 25)
120#define IRQ_TC11MP_PMU_SCU5 (IRQ_TC11MP_GIC_START + 26)
121#define IRQ_TC11MP_PMU_SCU6 (IRQ_TC11MP_GIC_START + 27)
122#define IRQ_TC11MP_PMU_SCU7 (IRQ_TC11MP_GIC_START + 28)
123
124#define IRQ_TC11MP_L220_EVENT (IRQ_TC11MP_GIC_START + 29)
125#define IRQ_TC11MP_L220_SLAVE (IRQ_TC11MP_GIC_START + 30)
126#define IRQ_TC11MP_L220_DECODE (IRQ_TC11MP_GIC_START + 31)
127
128/*
129 * RealView PB11MPCore GIC interrupt sources (secondary GIC on the board)
130 */
131#define IRQ_PB11MP_WATCHDOG (IRQ_PB11MP_GIC_START + 0) /* Watchdog timer */
132#define IRQ_PB11MP_SOFT (IRQ_PB11MP_GIC_START + 1) /* Software interrupt */
133#define IRQ_PB11MP_COMMRx (IRQ_PB11MP_GIC_START + 2) /* Debug Comm Rx interrupt */
134#define IRQ_PB11MP_COMMTx (IRQ_PB11MP_GIC_START + 3) /* Debug Comm Tx interrupt */
135#define IRQ_PB11MP_GPIO0 (IRQ_PB11MP_GIC_START + 6) /* GPIO 0 */
136#define IRQ_PB11MP_GPIO1 (IRQ_PB11MP_GIC_START + 7) /* GPIO 1 */
137#define IRQ_PB11MP_GPIO2 (IRQ_PB11MP_GIC_START + 8) /* GPIO 2 */
138 /* 9 reserved */
139#define IRQ_PB11MP_RTC_GIC1 (IRQ_PB11MP_GIC_START + 10) /* Real Time Clock */
140#define IRQ_PB11MP_SSP (IRQ_PB11MP_GIC_START + 11) /* Synchronous Serial Port */
141#define IRQ_PB11MP_UART0_GIC1 (IRQ_PB11MP_GIC_START + 12) /* UART 0 on development chip */
142#define IRQ_PB11MP_UART1_GIC1 (IRQ_PB11MP_GIC_START + 13) /* UART 1 on development chip */
143#define IRQ_PB11MP_UART2 (IRQ_PB11MP_GIC_START + 14) /* UART 2 on development chip */
144#define IRQ_PB11MP_UART3 (IRQ_PB11MP_GIC_START + 15) /* UART 3 on development chip */
145#define IRQ_PB11MP_SCI (IRQ_PB11MP_GIC_START + 16) /* Smart Card Interface */
146#define IRQ_PB11MP_MMCI0A_GIC1 (IRQ_PB11MP_GIC_START + 17) /* Multimedia Card 0A */
147#define IRQ_PB11MP_MMCI0B_GIC1 (IRQ_PB11MP_GIC_START + 18) /* Multimedia Card 0B */
148#define IRQ_PB11MP_AACI_GIC1 (IRQ_PB11MP_GIC_START + 19) /* Audio Codec */
149#define IRQ_PB11MP_KMI0_GIC1 (IRQ_PB11MP_GIC_START + 20) /* Keyboard/Mouse port 0 */
150#define IRQ_PB11MP_KMI1_GIC1 (IRQ_PB11MP_GIC_START + 21) /* Keyboard/Mouse port 1 */
151#define IRQ_PB11MP_CHARLCD (IRQ_PB11MP_GIC_START + 22) /* Character LCD */
152#define IRQ_PB11MP_CLCD (IRQ_PB11MP_GIC_START + 23) /* CLCD controller */
153#define IRQ_PB11MP_DMAC (IRQ_PB11MP_GIC_START + 24) /* DMA controller */
154#define IRQ_PB11MP_PWRFAIL (IRQ_PB11MP_GIC_START + 25) /* Power failure */
155#define IRQ_PB11MP_PISMO (IRQ_PB11MP_GIC_START + 26) /* PISMO interface */
156#define IRQ_PB11MP_DoC (IRQ_PB11MP_GIC_START + 27) /* Disk on Chip memory controller */
157#define IRQ_PB11MP_ETH_GIC1 (IRQ_PB11MP_GIC_START + 28) /* Ethernet controller */
158#define IRQ_PB11MP_USB_GIC1 (IRQ_PB11MP_GIC_START + 29) /* USB controller */
159#define IRQ_PB11MP_TSPEN (IRQ_PB11MP_GIC_START + 30) /* Touchscreen pen */
160#define IRQ_PB11MP_TSKPAD (IRQ_PB11MP_GIC_START + 31) /* Touchscreen keypad */
161
162#define IRQ_PB11MP_SMC -1
163#define IRQ_PB11MP_SCTL -1
164
165#define NR_GIC_PB11MP 2
166
167/*
168 * Only define NR_IRQS if less than NR_IRQS_PB11MP
169 */
170#define NR_IRQS_PB11MP (IRQ_TC11MP_GIC_START + 96)
171
172#if defined(CONFIG_MACH_REALVIEW_PB11MP)
173
174#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB11MP)
175#undef NR_IRQS
176#define NR_IRQS NR_IRQS_PB11MP
177#endif
178
179#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB11MP)
180#undef MAX_GIC_NR
181#define MAX_GIC_NR NR_GIC_PB11MP
182#endif
183
184#endif /* CONFIG_MACH_REALVIEW_PB11MP */
185
186#endif /* __ASM_ARCH_BOARD_PB11MP_H */
diff --git a/include/asm-arm/arch-realview/debug-macro.S b/include/asm-arm/arch-realview/debug-macro.S
deleted file mode 100644
index c8c860c3c26e..000000000000
--- a/include/asm-arm/arch-realview/debug-macro.S
+++ /dev/null
@@ -1,22 +0,0 @@
1/* linux/include/asm-arm/arch-realview/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14 .macro addruart,rx
15 mrc p15, 0, \rx, c1, c0
16 tst \rx, #1 @ MMU enabled?
17 moveq \rx, #0x10000000
18 movne \rx, #0xf0000000 @ virtual base
19 orr \rx, \rx, #0x00009000
20 .endm
21
22#include <asm/hardware/debug-pl01x.S>
diff --git a/include/asm-arm/arch-realview/dma.h b/include/asm-arm/arch-realview/dma.h
deleted file mode 100644
index 8342e3f9d6ec..000000000000
--- a/include/asm-arm/arch-realview/dma.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * linux/include/asm-arm/arch-realview/dma.h
3 *
4 * Copyright (C) 2003 ARM Limited.
5 * Copyright (C) 1997,1998 Russell King
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
diff --git a/include/asm-arm/arch-realview/entry-macro.S b/include/asm-arm/arch-realview/entry-macro.S
deleted file mode 100644
index 31a39a7cdaa9..000000000000
--- a/include/asm-arm/arch-realview/entry-macro.S
+++ /dev/null
@@ -1,81 +0,0 @@
1/*
2 * include/asm-arm/arch-realview/entry-macro.S
3 *
4 * Low-level IRQ helper macros for RealView platforms
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10#include <asm/arch/hardware.h>
11#include <asm/hardware/gic.h>
12
13 .macro disable_fiq
14 .endm
15
16 .macro get_irqnr_preamble, base, tmp
17 ldr \base, =gic_cpu_base_addr
18 ldr \base, [\base]
19 .endm
20
21 .macro arch_ret_to_user, tmp1, tmp2
22 .endm
23
24 /*
25 * The interrupt numbering scheme is defined in the
26 * interrupt controller spec. To wit:
27 *
28 * Interrupts 0-15 are IPI
29 * 16-28 are reserved
30 * 29-31 are local. We allow 30 to be used for the watchdog.
31 * 32-1020 are global
32 * 1021-1022 are reserved
33 * 1023 is "spurious" (no interrupt)
34 *
35 * For now, we ignore all local interrupts so only return an interrupt if it's
36 * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs.
37 *
38 * A simple read from the controller will tell us the number of the highest
39 * priority enabled interrupt. We then just need to check whether it is in the
40 * valid range for an IRQ (30-1020 inclusive).
41 */
42
43 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
44
45 ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
46
47 ldr \tmp, =1021
48
49 bic \irqnr, \irqstat, #0x1c00
50
51 cmp \irqnr, #29
52 cmpcc \irqnr, \irqnr
53 cmpne \irqnr, \tmp
54 cmpcs \irqnr, \irqnr
55
56 .endm
57
58 /* We assume that irqstat (the raw value of the IRQ acknowledge
59 * register) is preserved from the macro above.
60 * If there is an IPI, we immediately signal end of interrupt on the
61 * controller, since this requires the original irqstat value which
62 * we won't easily be able to recreate later.
63 */
64
65 .macro test_for_ipi, irqnr, irqstat, base, tmp
66 bic \irqnr, \irqstat, #0x1c00
67 cmp \irqnr, #16
68 strcc \irqstat, [\base, #GIC_CPU_EOI]
69 cmpcs \irqnr, \irqnr
70 .endm
71
72 /* As above, this assumes that irqstat and base are preserved.. */
73
74 .macro test_for_ltirq, irqnr, irqstat, base, tmp
75 bic \irqnr, \irqstat, #0x1c00
76 mov \tmp, #0
77 cmp \irqnr, #29
78 moveq \tmp, #1
79 streq \irqstat, [\base, #GIC_CPU_EOI]
80 cmp \tmp, #0
81 .endm
diff --git a/include/asm-arm/arch-realview/hardware.h b/include/asm-arm/arch-realview/hardware.h
deleted file mode 100644
index 1ee8313ceb6a..000000000000
--- a/include/asm-arm/arch-realview/hardware.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * linux/include/asm-arm/arch-realview/hardware.h
3 *
4 * This file contains the hardware definitions of the RealView boards.
5 *
6 * Copyright (C) 2003 ARM Limited.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22#ifndef __ASM_ARCH_HARDWARE_H
23#define __ASM_ARCH_HARDWARE_H
24
25#include <asm/sizes.h>
26
27/* macro to get at IO space when running virtually */
28#define IO_ADDRESS(x) (((x) & 0x0fffffff) + 0xf0000000)
29#define __io_address(n) __io(IO_ADDRESS(n))
30
31#endif
diff --git a/include/asm-arm/arch-realview/io.h b/include/asm-arm/arch-realview/io.h
deleted file mode 100644
index c70f1dfbe135..000000000000
--- a/include/asm-arm/arch-realview/io.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * linux/include/asm-arm/arch-realview/io.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H
22
23#define IO_SPACE_LIMIT 0xffffffff
24
25static inline void __iomem *__io(unsigned long addr)
26{
27 return (void __iomem *)addr;
28}
29
30#define __io(a) __io(a)
31#define __mem_pci(a) (a)
32
33#endif
diff --git a/include/asm-arm/arch-realview/irqs.h b/include/asm-arm/arch-realview/irqs.h
deleted file mode 100644
index ccbac59235c6..000000000000
--- a/include/asm-arm/arch-realview/irqs.h
+++ /dev/null
@@ -1,38 +0,0 @@
1/*
2 * linux/include/asm-arm/arch-realview/irqs.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#ifndef __ASM_ARCH_IRQS_H
23#define __ASM_ARCH_IRQS_H
24
25#include <asm/arch/board-eb.h>
26#include <asm/arch/board-pb11mp.h>
27#include <asm/arch/board-pb1176.h>
28
29#define IRQ_LOCALTIMER 29
30#define IRQ_LOCALWDOG 30
31
32#define IRQ_GIC_START 32
33
34#ifndef NR_IRQS
35#error "NR_IRQS not defined by the board-specific files"
36#endif
37
38#endif
diff --git a/include/asm-arm/arch-realview/memory.h b/include/asm-arm/arch-realview/memory.h
deleted file mode 100644
index ed370abb638f..000000000000
--- a/include/asm-arm/arch-realview/memory.h
+++ /dev/null
@@ -1,38 +0,0 @@
1/*
2 * linux/include/asm-arm/arch-realview/memory.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARCH_MEMORY_H
21#define __ASM_ARCH_MEMORY_H
22
23/*
24 * Physical DRAM offset.
25 */
26#define PHYS_OFFSET UL(0x00000000)
27
28/*
29 * Virtual view <-> DMA view memory address translations
30 * virt_to_bus: Used to translate the virtual address to an
31 * address suitable to be passed to set_dma_addr
32 * bus_to_virt: Used to convert an address for DMA operations
33 * to an address that the kernel can use.
34 */
35#define __virt_to_bus(x) ((x) - PAGE_OFFSET)
36#define __bus_to_virt(x) ((x) + PAGE_OFFSET)
37
38#endif
diff --git a/include/asm-arm/arch-realview/platform.h b/include/asm-arm/arch-realview/platform.h
deleted file mode 100644
index 424c0aaf46a0..000000000000
--- a/include/asm-arm/arch-realview/platform.h
+++ /dev/null
@@ -1,293 +0,0 @@
1/*
2 * linux/include/asm-arm/arch-realview/platform.h
3 *
4 * Copyright (c) ARM Limited 2003. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef __ASM_ARCH_PLATFORM_H
22#define __ASM_ARCH_PLATFORM_H
23
24/*
25 * Memory definitions
26 */
27#define REALVIEW_BOOT_ROM_LO 0x30000000 /* DoC Base (64Mb)...*/
28#define REALVIEW_BOOT_ROM_HI 0x30000000
29#define REALVIEW_BOOT_ROM_BASE REALVIEW_BOOT_ROM_HI /* Normal position */
30#define REALVIEW_BOOT_ROM_SIZE SZ_64M
31
32#define REALVIEW_SSRAM_BASE /* REALVIEW_SSMC_BASE ? */
33#define REALVIEW_SSRAM_SIZE SZ_2M
34
35/*
36 * SDRAM
37 */
38#define REALVIEW_SDRAM_BASE 0x00000000
39
40/*
41 * Logic expansion modules
42 *
43 */
44
45
46/* ------------------------------------------------------------------------
47 * RealView Registers
48 * ------------------------------------------------------------------------
49 *
50 */
51#define REALVIEW_SYS_ID_OFFSET 0x00
52#define REALVIEW_SYS_SW_OFFSET 0x04
53#define REALVIEW_SYS_LED_OFFSET 0x08
54#define REALVIEW_SYS_OSC0_OFFSET 0x0C
55
56#define REALVIEW_SYS_OSC1_OFFSET 0x10
57#define REALVIEW_SYS_OSC2_OFFSET 0x14
58#define REALVIEW_SYS_OSC3_OFFSET 0x18
59#define REALVIEW_SYS_OSC4_OFFSET 0x1C /* OSC1 for RealView/AB */
60
61#define REALVIEW_SYS_LOCK_OFFSET 0x20
62#define REALVIEW_SYS_100HZ_OFFSET 0x24
63#define REALVIEW_SYS_CFGDATA1_OFFSET 0x28
64#define REALVIEW_SYS_CFGDATA2_OFFSET 0x2C
65#define REALVIEW_SYS_FLAGS_OFFSET 0x30
66#define REALVIEW_SYS_FLAGSSET_OFFSET 0x30
67#define REALVIEW_SYS_FLAGSCLR_OFFSET 0x34
68#define REALVIEW_SYS_NVFLAGS_OFFSET 0x38
69#define REALVIEW_SYS_NVFLAGSSET_OFFSET 0x38
70#define REALVIEW_SYS_NVFLAGSCLR_OFFSET 0x3C
71#define REALVIEW_SYS_RESETCTL_OFFSET 0x40
72#define REALVIEW_SYS_PCICTL_OFFSET 0x44
73#define REALVIEW_SYS_MCI_OFFSET 0x48
74#define REALVIEW_SYS_FLASH_OFFSET 0x4C
75#define REALVIEW_SYS_CLCD_OFFSET 0x50
76#define REALVIEW_SYS_CLCDSER_OFFSET 0x54
77#define REALVIEW_SYS_BOOTCS_OFFSET 0x58
78#define REALVIEW_SYS_24MHz_OFFSET 0x5C
79#define REALVIEW_SYS_MISC_OFFSET 0x60
80#define REALVIEW_SYS_IOSEL_OFFSET 0x70
81#define REALVIEW_SYS_PROCID_OFFSET 0x84
82#define REALVIEW_SYS_TEST_OSC0_OFFSET 0xC0
83#define REALVIEW_SYS_TEST_OSC1_OFFSET 0xC4
84#define REALVIEW_SYS_TEST_OSC2_OFFSET 0xC8
85#define REALVIEW_SYS_TEST_OSC3_OFFSET 0xCC
86#define REALVIEW_SYS_TEST_OSC4_OFFSET 0xD0
87
88#define REALVIEW_SYS_BASE 0x10000000
89#define REALVIEW_SYS_ID (REALVIEW_SYS_BASE + REALVIEW_SYS_ID_OFFSET)
90#define REALVIEW_SYS_SW (REALVIEW_SYS_BASE + REALVIEW_SYS_SW_OFFSET)
91#define REALVIEW_SYS_LED (REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET)
92#define REALVIEW_SYS_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC0_OFFSET)
93#define REALVIEW_SYS_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC1_OFFSET)
94
95#define REALVIEW_SYS_LOCK (REALVIEW_SYS_BASE + REALVIEW_SYS_LOCK_OFFSET)
96#define REALVIEW_SYS_100HZ (REALVIEW_SYS_BASE + REALVIEW_SYS_100HZ_OFFSET)
97#define REALVIEW_SYS_CFGDATA1 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA1_OFFSET)
98#define REALVIEW_SYS_CFGDATA2 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA2_OFFSET)
99#define REALVIEW_SYS_FLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGS_OFFSET)
100#define REALVIEW_SYS_FLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSSET_OFFSET)
101#define REALVIEW_SYS_FLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSCLR_OFFSET)
102#define REALVIEW_SYS_NVFLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGS_OFFSET)
103#define REALVIEW_SYS_NVFLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSSET_OFFSET)
104#define REALVIEW_SYS_NVFLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSCLR_OFFSET)
105#define REALVIEW_SYS_RESETCTL (REALVIEW_SYS_BASE + REALVIEW_SYS_RESETCTL_OFFSET)
106#define REALVIEW_SYS_PCICTL (REALVIEW_SYS_BASE + REALVIEW_SYS_PCICTL_OFFSET)
107#define REALVIEW_SYS_MCI (REALVIEW_SYS_BASE + REALVIEW_SYS_MCI_OFFSET)
108#define REALVIEW_SYS_FLASH (REALVIEW_SYS_BASE + REALVIEW_SYS_FLASH_OFFSET)
109#define REALVIEW_SYS_CLCD (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCD_OFFSET)
110#define REALVIEW_SYS_CLCDSER (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCDSER_OFFSET)
111#define REALVIEW_SYS_BOOTCS (REALVIEW_SYS_BASE + REALVIEW_SYS_BOOTCS_OFFSET)
112#define REALVIEW_SYS_24MHz (REALVIEW_SYS_BASE + REALVIEW_SYS_24MHz_OFFSET)
113#define REALVIEW_SYS_MISC (REALVIEW_SYS_BASE + REALVIEW_SYS_MISC_OFFSET)
114#define REALVIEW_SYS_IOSEL (REALVIEW_SYS_BASE + REALVIEW_SYS_IOSEL_OFFSET)
115#define REALVIEW_SYS_PROCID (REALVIEW_SYS_BASE + REALVIEW_SYS_PROCID_OFFSET)
116#define REALVIEW_SYS_TEST_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC0_OFFSET)
117#define REALVIEW_SYS_TEST_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC1_OFFSET)
118#define REALVIEW_SYS_TEST_OSC2 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC2_OFFSET)
119#define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET)
120#define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET)
121
122/*
123 * Values for REALVIEW_SYS_RESET_CTRL
124 */
125#define REALVIEW_SYS_CTRL_RESET_CONFIGCLR 0x01
126#define REALVIEW_SYS_CTRL_RESET_CONFIGINIT 0x02
127#define REALVIEW_SYS_CTRL_RESET_DLLRESET 0x03
128#define REALVIEW_SYS_CTRL_RESET_PLLRESET 0x04
129#define REALVIEW_SYS_CTRL_RESET_POR 0x05
130#define REALVIEW_SYS_CTRL_RESET_DoC 0x06
131
132#define REALVIEW_SYS_CTRL_LED (1 << 0)
133
134
135/* ------------------------------------------------------------------------
136 * RealView control registers
137 * ------------------------------------------------------------------------
138 */
139
140/*
141 * REALVIEW_IDFIELD
142 *
143 * 31:24 = manufacturer (0x41 = ARM)
144 * 23:16 = architecture (0x08 = AHB system bus, ASB processor bus)
145 * 15:12 = FPGA (0x3 = XVC600 or XVC600E)
146 * 11:4 = build value
147 * 3:0 = revision number (0x1 = rev B (AHB))
148 */
149
150/*
151 * REALVIEW_SYS_LOCK
152 * control access to SYS_OSCx, SYS_CFGDATAx, SYS_RESETCTL,
153 * SYS_CLD, SYS_BOOTCS
154 */
155#define REALVIEW_SYS_LOCK_LOCKED (1 << 16)
156#define REALVIEW_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */
157
158/*
159 * REALVIEW_SYS_FLASH
160 */
161#define REALVIEW_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */
162
163/*
164 * REALVIEW_INTREG
165 * - used to acknowledge and control MMCI and UART interrupts
166 */
167#define REALVIEW_INTREG_WPROT 0x00 /* MMC protection status (no interrupt generated) */
168#define REALVIEW_INTREG_RI0 0x01 /* Ring indicator UART0 is asserted, */
169#define REALVIEW_INTREG_CARDIN 0x08 /* MMCI card in detect */
170 /* write 1 to acknowledge and clear */
171#define REALVIEW_INTREG_RI1 0x02 /* Ring indicator UART1 is asserted, */
172#define REALVIEW_INTREG_CARDINSERT 0x03 /* Signal insertion of MMC card */
173
174/*
175 * RealView common peripheral addresses
176 */
177#define REALVIEW_SCTL_BASE 0x10001000 /* System controller */
178#define REALVIEW_I2C_BASE 0x10002000 /* I2C control */
179#define REALVIEW_AACI_BASE 0x10004000 /* Audio */
180#define REALVIEW_MMCI0_BASE 0x10005000 /* MMC interface */
181#define REALVIEW_KMI0_BASE 0x10006000 /* KMI interface */
182#define REALVIEW_KMI1_BASE 0x10007000 /* KMI 2nd interface */
183#define REALVIEW_CHAR_LCD_BASE 0x10008000 /* Character LCD */
184#define REALVIEW_SCI_BASE 0x1000E000 /* Smart card controller */
185#define REALVIEW_GPIO1_BASE 0x10014000 /* GPIO port 1 */
186#define REALVIEW_GPIO2_BASE 0x10015000 /* GPIO port 2 */
187#define REALVIEW_DMC_BASE 0x10018000 /* DMC configuration */
188#define REALVIEW_DMAC_BASE 0x10030000 /* DMA controller */
189
190/* PCI space */
191#define REALVIEW_PCI_BASE 0x41000000 /* PCI Interface */
192#define REALVIEW_PCI_CFG_BASE 0x42000000
193#define REALVIEW_PCI_MEM_BASE0 0x44000000
194#define REALVIEW_PCI_MEM_BASE1 0x50000000
195#define REALVIEW_PCI_MEM_BASE2 0x60000000
196/* Sizes of above maps */
197#define REALVIEW_PCI_BASE_SIZE 0x01000000
198#define REALVIEW_PCI_CFG_BASE_SIZE 0x02000000
199#define REALVIEW_PCI_MEM_BASE0_SIZE 0x0c000000 /* 32Mb */
200#define REALVIEW_PCI_MEM_BASE1_SIZE 0x10000000 /* 256Mb */
201#define REALVIEW_PCI_MEM_BASE2_SIZE 0x10000000 /* 256Mb */
202
203#define REALVIEW_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */
204#define REALVIEW_LT_BASE 0x80000000 /* Logic Tile expansion */
205
206/*
207 * Disk on Chip
208 */
209#define REALVIEW_DOC_BASE 0x2C000000
210#define REALVIEW_DOC_SIZE (16 << 20)
211#define REALVIEW_DOC_PAGE_SIZE 512
212#define REALVIEW_DOC_TOTAL_PAGES (DOC_SIZE / PAGE_SIZE)
213
214#define ERASE_UNIT_PAGES 32
215#define START_PAGE 0x80
216
217/*
218 * LED settings, bits [7:0]
219 */
220#define REALVIEW_SYS_LED0 (1 << 0)
221#define REALVIEW_SYS_LED1 (1 << 1)
222#define REALVIEW_SYS_LED2 (1 << 2)
223#define REALVIEW_SYS_LED3 (1 << 3)
224#define REALVIEW_SYS_LED4 (1 << 4)
225#define REALVIEW_SYS_LED5 (1 << 5)
226#define REALVIEW_SYS_LED6 (1 << 6)
227#define REALVIEW_SYS_LED7 (1 << 7)
228
229#define ALL_LEDS 0xFF
230
231#define LED_BANK REALVIEW_SYS_LED
232
233/*
234 * Control registers
235 */
236#define REALVIEW_IDFIELD_OFFSET 0x0 /* RealView build information */
237#define REALVIEW_FLASHPROG_OFFSET 0x4 /* Flash devices */
238#define REALVIEW_INTREG_OFFSET 0x8 /* Interrupt control */
239#define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */
240
241/*
242 * Application Flash
243 *
244 */
245#define FLASH_BASE REALVIEW_FLASH_BASE
246#define FLASH_SIZE REALVIEW_FLASH_SIZE
247#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1)
248#define FLASH_BLOCK_SIZE SZ_128K
249
250/*
251 * Boot Flash
252 *
253 */
254#define EPROM_BASE REALVIEW_BOOT_ROM_HI
255#define EPROM_SIZE REALVIEW_BOOT_ROM_SIZE
256#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1)
257
258/*
259 * Clean base - dummy
260 *
261 */
262#define CLEAN_BASE EPROM_BASE
263
264/*
265 * System controller bit assignment
266 */
267#define REALVIEW_REFCLK 0
268#define REALVIEW_TIMCLK 1
269
270#define REALVIEW_TIMER1_EnSel 15
271#define REALVIEW_TIMER2_EnSel 17
272#define REALVIEW_TIMER3_EnSel 19
273#define REALVIEW_TIMER4_EnSel 21
274
275
276#define MAX_TIMER 2
277#define MAX_PERIOD 699050
278#define TICKS_PER_uSEC 1
279
280/*
281 * These are useconds NOT ticks.
282 *
283 */
284#define mSEC_1 1000
285#define mSEC_5 (mSEC_1 * 5)
286#define mSEC_10 (mSEC_1 * 10)
287#define mSEC_25 (mSEC_1 * 25)
288#define SEC_1 (mSEC_1 * 1000)
289
290#define REALVIEW_CSR_BASE 0x10000000
291#define REALVIEW_CSR_SIZE 0x10000000
292
293#endif /* __ASM_ARCH_PLATFORM_H */
diff --git a/include/asm-arm/arch-realview/scu.h b/include/asm-arm/arch-realview/scu.h
deleted file mode 100644
index d55802d645af..000000000000
--- a/include/asm-arm/arch-realview/scu.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef __ASMARM_ARCH_SCU_H
2#define __ASMARM_ARCH_SCU_H
3
4/*
5 * SCU registers
6 */
7#define SCU_CTRL 0x00
8#define SCU_CONFIG 0x04
9#define SCU_CPU_STATUS 0x08
10#define SCU_INVALIDATE 0x0c
11#define SCU_FPGA_REVISION 0x10
12
13#endif
diff --git a/include/asm-arm/arch-realview/smp.h b/include/asm-arm/arch-realview/smp.h
deleted file mode 100644
index 515819efd046..000000000000
--- a/include/asm-arm/arch-realview/smp.h
+++ /dev/null
@@ -1,30 +0,0 @@
1#ifndef ASMARM_ARCH_SMP_H
2#define ASMARM_ARCH_SMP_H
3
4
5#include <asm/hardware/gic.h>
6
7#define hard_smp_processor_id() \
8 ({ \
9 unsigned int cpunum; \
10 __asm__("mrc p15, 0, %0, c0, c0, 5" \
11 : "=r" (cpunum)); \
12 cpunum &= 0x0F; \
13 })
14
15/*
16 * We use IRQ1 as the IPI
17 */
18static inline void smp_cross_call(cpumask_t callmap)
19{
20 gic_raise_softirq(callmap, 1);
21}
22
23/*
24 * Do nothing on MPcore.
25 */
26static inline void smp_cross_call_done(cpumask_t callmap)
27{
28}
29
30#endif
diff --git a/include/asm-arm/arch-realview/system.h b/include/asm-arm/arch-realview/system.h
deleted file mode 100644
index bff3d3fcf846..000000000000
--- a/include/asm-arm/arch-realview/system.h
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * linux/include/asm-arm/arch-realview/system.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef __ASM_ARCH_SYSTEM_H
22#define __ASM_ARCH_SYSTEM_H
23
24#include <asm/arch/hardware.h>
25#include <asm/io.h>
26#include <asm/arch/platform.h>
27
28static inline void arch_idle(void)
29{
30 /*
31 * This should do all the clock switching
32 * and wait for interrupt tricks
33 */
34 cpu_do_idle();
35}
36
37static inline void arch_reset(char mode)
38{
39 void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET;
40 unsigned int val;
41
42 /*
43 * To reset, we hit the on-board reset register
44 * in the system FPGA
45 */
46 val = __raw_readl(hdr_ctrl);
47 val |= REALVIEW_SYS_CTRL_RESET_CONFIGCLR;
48 __raw_writel(val, hdr_ctrl);
49}
50
51#endif
diff --git a/include/asm-arm/arch-realview/timex.h b/include/asm-arm/arch-realview/timex.h
deleted file mode 100644
index 5b9d82d0a5e0..000000000000
--- a/include/asm-arm/arch-realview/timex.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * linux/include/asm-arm/arch-realview/timex.h
3 *
4 * RealView architecture timex specifications
5 *
6 * Copyright (C) 2003 ARM Limited
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#define CLOCK_TICK_RATE (50000000 / 16)
diff --git a/include/asm-arm/arch-realview/uncompress.h b/include/asm-arm/arch-realview/uncompress.h
deleted file mode 100644
index 3f7ae2e0260d..000000000000
--- a/include/asm-arm/arch-realview/uncompress.h
+++ /dev/null
@@ -1,72 +0,0 @@
1/*
2 * linux/include/asm-arm/arch-realview/uncompress.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#include <asm/arch/hardware.h>
21#include <asm/mach-types.h>
22
23#include <asm/arch/board-eb.h>
24#include <asm/arch/board-pb11mp.h>
25#include <asm/arch/board-pb1176.h>
26
27#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
28#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c))
29#define AMBA_UART_CR(base) (*(volatile unsigned char *)((base) + 0x30))
30#define AMBA_UART_FR(base) (*(volatile unsigned char *)((base) + 0x18))
31
32/*
33 * Return the UART base address
34 */
35static inline unsigned long get_uart_base(void)
36{
37 if (machine_is_realview_eb())
38 return REALVIEW_EB_UART0_BASE;
39 else if (machine_is_realview_pb11mp())
40 return REALVIEW_PB11MP_UART0_BASE;
41 else if (machine_is_realview_pb1176())
42 return REALVIEW_PB1176_UART0_BASE;
43 else
44 return 0;
45}
46
47/*
48 * This does not append a newline
49 */
50static inline void putc(int c)
51{
52 unsigned long base = get_uart_base();
53
54 while (AMBA_UART_FR(base) & (1 << 5))
55 barrier();
56
57 AMBA_UART_DR(base) = c;
58}
59
60static inline void flush(void)
61{
62 unsigned long base = get_uart_base();
63
64 while (AMBA_UART_FR(base) & (1 << 3))
65 barrier();
66}
67
68/*
69 * nothing to do
70 */
71#define arch_decomp_setup()
72#define arch_decomp_wdog()
diff --git a/include/asm-arm/arch-realview/vmalloc.h b/include/asm-arm/arch-realview/vmalloc.h
deleted file mode 100644
index 0ad49af186af..000000000000
--- a/include/asm-arm/arch-realview/vmalloc.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * linux/include/asm-arm/arch-realview/vmalloc.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 * Copyright (C) 2000 Russell King.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#define VMALLOC_END (PAGE_OFFSET + 0x18000000)
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-14 19:13:59 -0500