diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2006-12-19 09:17:46 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-02-06 11:46:45 -0500 |
commit | 10c03f69680e9e2acd8a9409a230aef37295ac49 (patch) | |
tree | 7ac927b0e93b20584f25de300ec2a4b2803c8529 /include/asm-arm/arch-realview/irqs.h | |
parent | 2d9e1ae06d8f0bb187ea083fabab2dfb6f589270 (diff) |
[ARM] oprofile: add ARM11 SMP support
Add the glue for ARM11 SMP oprofile support, which also supports the
performance monitor in the coherency unit.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-realview/irqs.h')
-rw-r--r-- | include/asm-arm/arch-realview/irqs.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/include/asm-arm/arch-realview/irqs.h b/include/asm-arm/arch-realview/irqs.h index c16223c9588d..76b498eb20a6 100644 --- a/include/asm-arm/arch-realview/irqs.h +++ b/include/asm-arm/arch-realview/irqs.h | |||
@@ -65,6 +65,18 @@ | |||
65 | #define IRQ_AACI (IRQ_GIC_START + INT_AACI) | 65 | #define IRQ_AACI (IRQ_GIC_START + INT_AACI) |
66 | #define IRQ_ETH (IRQ_GIC_START + INT_ETH) | 66 | #define IRQ_ETH (IRQ_GIC_START + INT_ETH) |
67 | #define IRQ_USB (IRQ_GIC_START + INT_USB) | 67 | #define IRQ_USB (IRQ_GIC_START + INT_USB) |
68 | #define IRQ_PMU_CPU0 (IRQ_GIC_START + INT_PMU_CPU0) | ||
69 | #define IRQ_PMU_CPU1 (IRQ_GIC_START + INT_PMU_CPU1) | ||
70 | #define IRQ_PMU_CPU2 (IRQ_GIC_START + INT_PMU_CPU2) | ||
71 | #define IRQ_PMU_CPU3 (IRQ_GIC_START + INT_PMU_CPU3) | ||
72 | #define IRQ_PMU_SCU0 (IRQ_GIC_START + INT_PMU_SCU0) | ||
73 | #define IRQ_PMU_SCU1 (IRQ_GIC_START + INT_PMU_SCU1) | ||
74 | #define IRQ_PMU_SCU2 (IRQ_GIC_START + INT_PMU_SCU2) | ||
75 | #define IRQ_PMU_SCU3 (IRQ_GIC_START + INT_PMU_SCU3) | ||
76 | #define IRQ_PMU_SCU4 (IRQ_GIC_START + INT_PMU_SCU4) | ||
77 | #define IRQ_PMU_SCU5 (IRQ_GIC_START + INT_PMU_SCU5) | ||
78 | #define IRQ_PMU_SCU6 (IRQ_GIC_START + INT_PMU_SCU6) | ||
79 | #define IRQ_PMU_SCU7 (IRQ_GIC_START + INT_PMU_SCU7) | ||
68 | 80 | ||
69 | #define IRQMASK_WDOGINT INTMASK_WDOGINT | 81 | #define IRQMASK_WDOGINT INTMASK_WDOGINT |
70 | #define IRQMASK_SOFTINT INTMASK_SOFTINT | 82 | #define IRQMASK_SOFTINT INTMASK_SOFTINT |