diff options
author | Dmitry Torokhov <dtor@insightbb.com> | 2007-05-01 00:24:54 -0400 |
---|---|---|
committer | Dmitry Torokhov <dtor@insightbb.com> | 2007-05-01 00:24:54 -0400 |
commit | bc95f3669f5e6f63cf0b84fe4922c3c6dd4aa775 (patch) | |
tree | 427fcf2a7287c16d4b5aa6cbf494d59579a6a8b1 /include/asm-arm/arch-pxa | |
parent | 3d29cdff999c37b3876082278a8134a0642a02cd (diff) | |
parent | dc87c3985e9b442c60994308a96f887579addc39 (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
drivers/usb/input/Makefile
drivers/usb/input/gtco.c
Diffstat (limited to 'include/asm-arm/arch-pxa')
-rw-r--r-- | include/asm-arm/arch-pxa/entry-macro.S | 6 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/gpio.h | 44 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/hardware.h | 12 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/pxa-regs.h | 26 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/udc.h | 30 |
5 files changed, 85 insertions, 33 deletions
diff --git a/include/asm-arm/arch-pxa/entry-macro.S b/include/asm-arm/arch-pxa/entry-macro.S index 4985e33afc12..1d5fbb9b379a 100644 --- a/include/asm-arm/arch-pxa/entry-macro.S +++ b/include/asm-arm/arch-pxa/entry-macro.S | |||
@@ -13,6 +13,12 @@ | |||
13 | .macro disable_fiq | 13 | .macro disable_fiq |
14 | .endm | 14 | .endm |
15 | 15 | ||
16 | .macro get_irqnr_preamble, base, tmp | ||
17 | .endm | ||
18 | |||
19 | .macro arch_ret_to_user, tmp1, tmp2 | ||
20 | .endm | ||
21 | |||
16 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 22 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
17 | #ifdef CONFIG_PXA27x | 23 | #ifdef CONFIG_PXA27x |
18 | mrc p6, 0, \irqstat, c0, c0, 0 @ ICIP | 24 | mrc p6, 0, \irqstat, c0, c0, 0 @ ICIP |
diff --git a/include/asm-arm/arch-pxa/gpio.h b/include/asm-arm/arch-pxa/gpio.h index e67c23821017..aeba24347f8e 100644 --- a/include/asm-arm/arch-pxa/gpio.h +++ b/include/asm-arm/arch-pxa/gpio.h | |||
@@ -25,10 +25,8 @@ | |||
25 | #define __ASM_ARCH_PXA_GPIO_H | 25 | #define __ASM_ARCH_PXA_GPIO_H |
26 | 26 | ||
27 | #include <asm/arch/pxa-regs.h> | 27 | #include <asm/arch/pxa-regs.h> |
28 | #include <asm/arch/irqs.h> | 28 | #include <asm/irq.h> |
29 | #include <asm/arch/hardware.h> | 29 | #include <asm/hardware.h> |
30 | |||
31 | #include <asm/errno.h> | ||
32 | 30 | ||
33 | static inline int gpio_request(unsigned gpio, const char *label) | 31 | static inline int gpio_request(unsigned gpio, const char *label) |
34 | { | 32 | { |
@@ -42,26 +40,36 @@ static inline void gpio_free(unsigned gpio) | |||
42 | 40 | ||
43 | static inline int gpio_direction_input(unsigned gpio) | 41 | static inline int gpio_direction_input(unsigned gpio) |
44 | { | 42 | { |
45 | if (gpio > PXA_LAST_GPIO) | 43 | return pxa_gpio_mode(gpio | GPIO_IN); |
46 | return -EINVAL; | ||
47 | pxa_gpio_mode(gpio | GPIO_IN); | ||
48 | } | 44 | } |
49 | 45 | ||
50 | static inline int gpio_direction_output(unsigned gpio) | 46 | static inline int gpio_direction_output(unsigned gpio, int value) |
51 | { | 47 | { |
52 | if (gpio > PXA_LAST_GPIO) | 48 | return pxa_gpio_mode(gpio | GPIO_OUT | (value ? 0 : GPIO_DFLT_LOW)); |
53 | return -EINVAL; | ||
54 | pxa_gpio_mode(gpio | GPIO_OUT); | ||
55 | } | 49 | } |
56 | 50 | ||
57 | /* REVISIT these macros are correct, but suffer code explosion | 51 | static inline int __gpio_get_value(unsigned gpio) |
58 | * for non-constant parameters. Provide out-line versions too. | 52 | { |
59 | */ | 53 | return GPLR(gpio) & GPIO_bit(gpio); |
60 | #define gpio_get_value(gpio) \ | 54 | } |
61 | (GPLR(gpio) & GPIO_bit(gpio)) | 55 | |
56 | #define gpio_get_value(gpio) \ | ||
57 | (__builtin_constant_p(gpio) ? \ | ||
58 | __gpio_get_value(gpio) : \ | ||
59 | pxa_gpio_get_value(gpio)) | ||
60 | |||
61 | static inline void __gpio_set_value(unsigned gpio, int value) | ||
62 | { | ||
63 | if (value) | ||
64 | GPSR(gpio) = GPIO_bit(gpio); | ||
65 | else | ||
66 | GPCR(gpio) = GPIO_bit(gpio); | ||
67 | } | ||
62 | 68 | ||
63 | #define gpio_set_value(gpio,value) \ | 69 | #define gpio_set_value(gpio,value) \ |
64 | ((value) ? (GPSR(gpio) = GPIO_bit(gpio)):(GPCR(gpio) = GPIO_bit(gpio))) | 70 | (__builtin_constant_p(gpio) ? \ |
71 | __gpio_set_value(gpio, value) : \ | ||
72 | pxa_gpio_set_value(gpio, value)) | ||
65 | 73 | ||
66 | #include <asm-generic/gpio.h> /* cansleep wrappers */ | 74 | #include <asm-generic/gpio.h> /* cansleep wrappers */ |
67 | 75 | ||
diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h index 3e70bd95472c..e2bdc2fbede1 100644 --- a/include/asm-arm/arch-pxa/hardware.h +++ b/include/asm-arm/arch-pxa/hardware.h | |||
@@ -65,7 +65,17 @@ | |||
65 | /* | 65 | /* |
66 | * Handy routine to set GPIO alternate functions | 66 | * Handy routine to set GPIO alternate functions |
67 | */ | 67 | */ |
68 | extern void pxa_gpio_mode( int gpio_mode ); | 68 | extern int pxa_gpio_mode( int gpio_mode ); |
69 | |||
70 | /* | ||
71 | * Return GPIO level, nonzero means high, zero is low | ||
72 | */ | ||
73 | extern int pxa_gpio_get_value(unsigned gpio); | ||
74 | |||
75 | /* | ||
76 | * Set output GPIO level | ||
77 | */ | ||
78 | extern void pxa_gpio_set_value(unsigned gpio, int value); | ||
69 | 79 | ||
70 | /* | 80 | /* |
71 | * Routine to enable or disable CKEN | 81 | * Routine to enable or disable CKEN |
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index e24f6b6c79ae..139c9d954818 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h | |||
@@ -463,9 +463,6 @@ | |||
463 | * Serial Audio Controller | 463 | * Serial Audio Controller |
464 | */ | 464 | */ |
465 | 465 | ||
466 | /* FIXME: This clash with SA1111 defines */ | ||
467 | #ifndef _ASM_ARCH_SA1111 | ||
468 | |||
469 | #define SACR0 __REG(0x40400000) /* Global Control Register */ | 466 | #define SACR0 __REG(0x40400000) /* Global Control Register */ |
470 | #define SACR1 __REG(0x40400004) /* Serial Audio I 2 S/MSB-Justified Control Register */ | 467 | #define SACR1 __REG(0x40400004) /* Serial Audio I 2 S/MSB-Justified Control Register */ |
471 | #define SASR0 __REG(0x4040000C) /* Serial Audio I 2 S/MSB-Justified Interface and FIFO Status Register */ | 468 | #define SASR0 __REG(0x4040000C) /* Serial Audio I 2 S/MSB-Justified Interface and FIFO Status Register */ |
@@ -474,8 +471,8 @@ | |||
474 | #define SADIV __REG(0x40400060) /* Audio Clock Divider Register. */ | 471 | #define SADIV __REG(0x40400060) /* Audio Clock Divider Register. */ |
475 | #define SADR __REG(0x40400080) /* Serial Audio Data Register (TX and RX FIFO access Register). */ | 472 | #define SADR __REG(0x40400080) /* Serial Audio Data Register (TX and RX FIFO access Register). */ |
476 | 473 | ||
477 | #define SACR0_RFTH(x) (x << 12) /* Rx FIFO Interrupt or DMA Trigger Threshold */ | 474 | #define SACR0_RFTH(x) ((x) << 12) /* Rx FIFO Interrupt or DMA Trigger Threshold */ |
478 | #define SACR0_TFTH(x) (x << 8) /* Tx FIFO Interrupt or DMA Trigger Threshold */ | 475 | #define SACR0_TFTH(x) ((x) << 8) /* Tx FIFO Interrupt or DMA Trigger Threshold */ |
479 | #define SACR0_STRF (1 << 5) /* FIFO Select for EFWR Special Function */ | 476 | #define SACR0_STRF (1 << 5) /* FIFO Select for EFWR Special Function */ |
480 | #define SACR0_EFWR (1 << 4) /* Enable EFWR Function */ | 477 | #define SACR0_EFWR (1 << 4) /* Enable EFWR Function */ |
481 | #define SACR0_RST (1 << 3) /* FIFO, i2s Register Reset */ | 478 | #define SACR0_RST (1 << 3) /* FIFO, i2s Register Reset */ |
@@ -503,8 +500,6 @@ | |||
503 | #define SAIMR_RFS (1 << 4) /* Enable Rx FIFO Service Interrupt */ | 500 | #define SAIMR_RFS (1 << 4) /* Enable Rx FIFO Service Interrupt */ |
504 | #define SAIMR_TFS (1 << 3) /* Enable Tx FIFO Service Interrupt */ | 501 | #define SAIMR_TFS (1 << 3) /* Enable Tx FIFO Service Interrupt */ |
505 | 502 | ||
506 | #endif | ||
507 | |||
508 | /* | 503 | /* |
509 | * AC97 Controller registers | 504 | * AC97 Controller registers |
510 | */ | 505 | */ |
@@ -1481,7 +1476,7 @@ | |||
1481 | #define GPIO112_MMCCMD_MD (112 | GPIO_ALT_FN_1_OUT) | 1476 | #define GPIO112_MMCCMD_MD (112 | GPIO_ALT_FN_1_OUT) |
1482 | #define GPIO113_I2S_SYSCLK_MD (113 | GPIO_ALT_FN_1_OUT) | 1477 | #define GPIO113_I2S_SYSCLK_MD (113 | GPIO_ALT_FN_1_OUT) |
1483 | #define GPIO113_AC97_RESET_N_MD (113 | GPIO_ALT_FN_2_OUT) | 1478 | #define GPIO113_AC97_RESET_N_MD (113 | GPIO_ALT_FN_2_OUT) |
1484 | #define GPIO117_I2CSCL_MD (117 | GPIO_ALT_FN_1_OUT) | 1479 | #define GPIO117_I2CSCL_MD (117 | GPIO_ALT_FN_1_IN) |
1485 | #define GPIO118_I2CSDA_MD (118 | GPIO_ALT_FN_1_IN) | 1480 | #define GPIO118_I2CSDA_MD (118 | GPIO_ALT_FN_1_IN) |
1486 | 1481 | ||
1487 | /* | 1482 | /* |
@@ -1682,15 +1677,18 @@ | |||
1682 | #define SSSR_PINT (1 << 18) /* Peripheral Trailing Byte Interrupt */ | 1677 | #define SSSR_PINT (1 << 18) /* Peripheral Trailing Byte Interrupt */ |
1683 | 1678 | ||
1684 | #define SSPSP_FSRT (1 << 25) /* Frame Sync Relative Timing */ | 1679 | #define SSPSP_FSRT (1 << 25) /* Frame Sync Relative Timing */ |
1685 | #define SSPSP_DMYSTOP(x) (x << 23) /* Dummy Stop */ | 1680 | #define SSPSP_DMYSTOP(x) ((x) << 23) /* Dummy Stop */ |
1686 | #define SSPSP_SFRMWDTH(x) (x << 16) /* Serial Frame Width */ | 1681 | #define SSPSP_SFRMWDTH(x) ((x) << 16) /* Serial Frame Width */ |
1687 | #define SSPSP_SFRMDLY(x) (x << 9) /* Serial Frame Delay */ | 1682 | #define SSPSP_SFRMDLY(x) ((x) << 9) /* Serial Frame Delay */ |
1688 | #define SSPSP_DMYSTRT(x) (x << 7) /* Dummy Start */ | 1683 | #define SSPSP_DMYSTRT(x) ((x) << 7) /* Dummy Start */ |
1689 | #define SSPSP_STRTDLY(x) (x << 4) /* Start Delay */ | 1684 | #define SSPSP_STRTDLY(x) ((x) << 4) /* Start Delay */ |
1690 | #define SSPSP_ETDS (1 << 3) /* End of Transfer data State */ | 1685 | #define SSPSP_ETDS (1 << 3) /* End of Transfer data State */ |
1691 | #define SSPSP_SFRMP (1 << 2) /* Serial Frame Polarity */ | 1686 | #define SSPSP_SFRMP (1 << 2) /* Serial Frame Polarity */ |
1692 | #define SSPSP_SCMODE(x) (x << 0) /* Serial Bit Rate Clock Mode */ | 1687 | #define SSPSP_SCMODE(x) ((x) << 0) /* Serial Bit Rate Clock Mode */ |
1693 | 1688 | ||
1689 | #define SSACD_SCDB (1 << 3) /* SSPSYSCLK Divider Bypass */ | ||
1690 | #define SSACD_ACPS(x) ((x) << 4) /* Audio clock PLL select */ | ||
1691 | #define SSACD_ACDS(x) ((x) << 0) /* Audio clock divider select */ | ||
1694 | 1692 | ||
1695 | #define SSCR0_P1 __REG(0x41000000) /* SSP Port 1 Control Register 0 */ | 1693 | #define SSCR0_P1 __REG(0x41000000) /* SSP Port 1 Control Register 0 */ |
1696 | #define SSCR1_P1 __REG(0x41000004) /* SSP Port 1 Control Register 1 */ | 1694 | #define SSCR1_P1 __REG(0x41000004) /* SSP Port 1 Control Register 1 */ |
diff --git a/include/asm-arm/arch-pxa/udc.h b/include/asm-arm/arch-pxa/udc.h index 646480d37256..8bc6f9c3e3ea 100644 --- a/include/asm-arm/arch-pxa/udc.h +++ b/include/asm-arm/arch-pxa/udc.h | |||
@@ -9,3 +9,33 @@ | |||
9 | 9 | ||
10 | extern void pxa_set_udc_info(struct pxa2xx_udc_mach_info *info); | 10 | extern void pxa_set_udc_info(struct pxa2xx_udc_mach_info *info); |
11 | 11 | ||
12 | static inline int udc_gpio_to_irq(unsigned gpio) | ||
13 | { | ||
14 | return IRQ_GPIO(gpio & GPIO_MD_MASK_NR); | ||
15 | } | ||
16 | |||
17 | static inline void udc_gpio_init_vbus(unsigned gpio) | ||
18 | { | ||
19 | pxa_gpio_mode((gpio & GPIO_MD_MASK_NR) | GPIO_IN); | ||
20 | } | ||
21 | |||
22 | static inline void udc_gpio_init_pullup(unsigned gpio) | ||
23 | { | ||
24 | pxa_gpio_mode((gpio & GPIO_MD_MASK_NR) | GPIO_OUT | GPIO_DFLT_LOW); | ||
25 | } | ||
26 | |||
27 | static inline int udc_gpio_get(unsigned gpio) | ||
28 | { | ||
29 | return (GPLR(gpio) & GPIO_bit(gpio)) != 0; | ||
30 | } | ||
31 | |||
32 | static inline void udc_gpio_set(unsigned gpio, int is_on) | ||
33 | { | ||
34 | int mask = GPIO_bit(gpio); | ||
35 | |||
36 | if (is_on) | ||
37 | GPSR(gpio) = mask; | ||
38 | else | ||
39 | GPCR(gpio) = mask; | ||
40 | } | ||
41 | |||