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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-07-09 16:34:25 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-07-09 16:34:25 -0400
commitf974a8ec96571535ee07880a023bcce0e3f2c76b (patch)
tree5cf09207b1ad292a55275cd0b24999fa29b9dfe8 /include/asm-arm/arch-pxa
parentc0b8556f2f8146bd38324b14b1ce00f249ba8ed9 (diff)
parent4ed47896935573c8423d05bddda3f269d6e6c613 (diff)
Merge branch 'machtypes' into pxa-palm
Diffstat (limited to 'include/asm-arm/arch-pxa')
-rw-r--r--include/asm-arm/arch-pxa/mfp-pxa27x.h1
-rw-r--r--include/asm-arm/arch-pxa/pxa2xx-gpio.h9
-rw-r--r--include/asm-arm/arch-pxa/regs-lcd.h5
3 files changed, 14 insertions, 1 deletions
diff --git a/include/asm-arm/arch-pxa/mfp-pxa27x.h b/include/asm-arm/arch-pxa/mfp-pxa27x.h
index eb6eaa174f8d..bc73ab84167c 100644
--- a/include/asm-arm/arch-pxa/mfp-pxa27x.h
+++ b/include/asm-arm/arch-pxa/mfp-pxa27x.h
@@ -112,6 +112,7 @@
112#define GPIO57_nIOIS16 MFP_CFG_IN(GPIO57, AF1) 112#define GPIO57_nIOIS16 MFP_CFG_IN(GPIO57, AF1)
113#define GPIO56_nPWAIT MFP_CFG_IN(GPIO56, AF1) 113#define GPIO56_nPWAIT MFP_CFG_IN(GPIO56, AF1)
114#define GPIO79_PSKTSEL MFP_CFG_OUT(GPIO79, AF1, DRIVE_HIGH) 114#define GPIO79_PSKTSEL MFP_CFG_OUT(GPIO79, AF1, DRIVE_HIGH)
115#define GPIO104_PSKTSEL MFP_CFG_OUT(GPIO104, AF1, DRIVE_HIGH)
115 116
116/* I2C */ 117/* I2C */
117#define GPIO117_I2C_SCL MFP_CFG_IN(GPIO117, AF1) 118#define GPIO117_I2C_SCL MFP_CFG_IN(GPIO117, AF1)
diff --git a/include/asm-arm/arch-pxa/pxa2xx-gpio.h b/include/asm-arm/arch-pxa/pxa2xx-gpio.h
index a6e60f691617..6ef1dd09970b 100644
--- a/include/asm-arm/arch-pxa/pxa2xx-gpio.h
+++ b/include/asm-arm/arch-pxa/pxa2xx-gpio.h
@@ -136,7 +136,11 @@
136#define GPIO93_CIF_DD_6 93 /* Camera data pin 6 */ 136#define GPIO93_CIF_DD_6 93 /* Camera data pin 6 */
137#define GPIO94_CIF_DD_5 94 /* Camera data pin 5 */ 137#define GPIO94_CIF_DD_5 94 /* Camera data pin 5 */
138#define GPIO95_CIF_DD_4 95 /* Camera data pin 4 */ 138#define GPIO95_CIF_DD_4 95 /* Camera data pin 4 */
139#define GPIO96_FFRXD 96 /* FFUART recieve */
140#define GPIO98_FFRTS 98 /* FFUART request to send */
139#define GPIO98_CIF_DD_0 98 /* Camera data pin 0 */ 141#define GPIO98_CIF_DD_0 98 /* Camera data pin 0 */
142#define GPIO99_FFTXD 99 /* FFUART transmit data */
143#define GPIO100_FFCTS 100 /* FFUART Clear to send */
140#define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */ 144#define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */
141#define GPIO103_CIF_DD_3 103 /* Camera data pin 3 */ 145#define GPIO103_CIF_DD_3 103 /* Camera data pin 3 */
142#define GPIO104_CIF_DD_2 104 /* Camera data pin 2 */ 146#define GPIO104_CIF_DD_2 104 /* Camera data pin 2 */
@@ -318,6 +322,8 @@
318#define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT) 322#define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT)
319#define GPIO85_CIF_LV_MD (85 | GPIO_ALT_FN_3_IN) 323#define GPIO85_CIF_LV_MD (85 | GPIO_ALT_FN_3_IN)
320#define GPIO86_nPCE_1_MD (86 | GPIO_ALT_FN_1_OUT) 324#define GPIO86_nPCE_1_MD (86 | GPIO_ALT_FN_1_OUT)
325#define GPIO88_USBH1_PWR_MD (88 | GPIO_ALT_FN_1_IN)
326#define GPIO89_USBH1_PEN_MD (89 | GPIO_ALT_FN_2_OUT)
321#define GPIO90_CIF_DD_4_MD (90 | GPIO_ALT_FN_3_IN) 327#define GPIO90_CIF_DD_4_MD (90 | GPIO_ALT_FN_3_IN)
322#define GPIO91_CIF_DD_5_MD (91 | GPIO_ALT_FN_3_IN) 328#define GPIO91_CIF_DD_5_MD (91 | GPIO_ALT_FN_3_IN)
323#define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT) 329#define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT)
@@ -326,8 +332,11 @@
326#define GPIO95_CIF_DD_4_MD (95 | GPIO_ALT_FN_2_IN) 332#define GPIO95_CIF_DD_4_MD (95 | GPIO_ALT_FN_2_IN)
327#define GPIO95_KP_MKIN6_MD (95 | GPIO_ALT_FN_3_IN) 333#define GPIO95_KP_MKIN6_MD (95 | GPIO_ALT_FN_3_IN)
328#define GPIO96_KP_DKIN3_MD (96 | GPIO_ALT_FN_1_IN) 334#define GPIO96_KP_DKIN3_MD (96 | GPIO_ALT_FN_1_IN)
335#define GPIO96_FFRXD_MD (96 | GPIO_ALT_FN_3_IN)
329#define GPIO97_KP_MKIN3_MD (97 | GPIO_ALT_FN_3_IN) 336#define GPIO97_KP_MKIN3_MD (97 | GPIO_ALT_FN_3_IN)
330#define GPIO98_CIF_DD_0_MD (98 | GPIO_ALT_FN_2_IN) 337#define GPIO98_CIF_DD_0_MD (98 | GPIO_ALT_FN_2_IN)
338#define GPIO98_FFRTS_MD (98 | GPIO_ALT_FN_3_OUT)
339#define GPIO99_FFTXD_MD (99 | GPIO_ALT_FN_3_OUT)
331#define GPIO100_KP_MKIN0_MD (100 | GPIO_ALT_FN_1_IN) 340#define GPIO100_KP_MKIN0_MD (100 | GPIO_ALT_FN_1_IN)
332#define GPIO101_KP_MKIN1_MD (101 | GPIO_ALT_FN_1_IN) 341#define GPIO101_KP_MKIN1_MD (101 | GPIO_ALT_FN_1_IN)
333#define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT) 342#define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT)
diff --git a/include/asm-arm/arch-pxa/regs-lcd.h b/include/asm-arm/arch-pxa/regs-lcd.h
index f762493f5141..3ba464c913a5 100644
--- a/include/asm-arm/arch-pxa/regs-lcd.h
+++ b/include/asm-arm/arch-pxa/regs-lcd.h
@@ -1,5 +1,8 @@
1#ifndef __ASM_ARCH_REGS_LCD_H 1#ifndef __ASM_ARCH_REGS_LCD_H
2#define __ASM_ARCH_REGS_LCD_H 2#define __ASM_ARCH_REGS_LCD_H
3
4#include <asm/arch/bitfield.h>
5
3/* 6/*
4 * LCD Controller Registers and Bits Definitions 7 * LCD Controller Registers and Bits Definitions
5 */ 8 */
@@ -69,7 +72,7 @@
69#define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */ 72#define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */
70#define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */ 73#define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */
71#define LCCR0_PDD_S 12 74#define LCCR0_PDD_S 12
72#define LCCR0_BM (1 << 20) /* Branch mask */ 75#define LCCR0_BM (1 << 20) /* Branch mask */
73#define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ 76#define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */
74#define LCCR0_LCDT (1 << 22) /* LCD panel type */ 77#define LCCR0_LCDT (1 << 22) /* LCD panel type */
75#define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */ 78#define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */