diff options
| author | Robert Jarzmik <rjarzmik@free.fr> | 2008-03-16 06:55:32 -0400 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-04-19 06:29:03 -0400 |
| commit | d72b1370b0b45f1fabda5ae4d603773d8a2c226a (patch) | |
| tree | 40e16e2cb1a17e6b9d293537c4bba5d744f9bc1e /include/asm-arm/arch-pxa | |
| parent | 942de47bfee24143ecbf75b981b32143bd414529 (diff) | |
[ARM] 4868/1: Enhance pxa270 GPIO definitions
Enhanced GPIO alternate functions descriptions,
taken from Intel PXA270 Developers Manual.
Signed-off-by: Robert Jarzmik <rjarzmik@free.fr>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-pxa')
| -rw-r--r-- | include/asm-arm/arch-pxa/pxa-regs.h | 68 |
1 files changed, 54 insertions, 14 deletions
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index 2357a73340d4..fd81e559f15d 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h | |||
| @@ -1248,11 +1248,13 @@ | |||
| 1248 | #define GPIO10_RTCCLK 10 /* real time clock (1 Hz) */ | 1248 | #define GPIO10_RTCCLK 10 /* real time clock (1 Hz) */ |
| 1249 | #define GPIO11_3_6MHz 11 /* 3.6 MHz oscillator out */ | 1249 | #define GPIO11_3_6MHz 11 /* 3.6 MHz oscillator out */ |
| 1250 | #define GPIO12_32KHz 12 /* 32 kHz out */ | 1250 | #define GPIO12_32KHz 12 /* 32 kHz out */ |
| 1251 | #define GPIO12_CIF_DD_7 12 /* Camera data pin 7 */ | ||
| 1251 | #define GPIO13_MBGNT 13 /* memory controller grant */ | 1252 | #define GPIO13_MBGNT 13 /* memory controller grant */ |
| 1252 | #define GPIO14_MBREQ 14 /* alternate bus master request */ | 1253 | #define GPIO14_MBREQ 14 /* alternate bus master request */ |
| 1253 | #define GPIO15_nCS_1 15 /* chip select 1 */ | 1254 | #define GPIO15_nCS_1 15 /* chip select 1 */ |
| 1254 | #define GPIO16_PWM0 16 /* PWM0 output */ | 1255 | #define GPIO16_PWM0 16 /* PWM0 output */ |
| 1255 | #define GPIO17_PWM1 17 /* PWM1 output */ | 1256 | #define GPIO17_PWM1 17 /* PWM1 output */ |
| 1257 | #define GPIO17_CIF_DD_6 17 /* Camera data pin 6 */ | ||
| 1256 | #define GPIO18_RDY 18 /* Ext. Bus Ready */ | 1258 | #define GPIO18_RDY 18 /* Ext. Bus Ready */ |
| 1257 | #define GPIO19_DREQ1 19 /* External DMA Request */ | 1259 | #define GPIO19_DREQ1 19 /* External DMA Request */ |
| 1258 | #define GPIO20_DREQ0 20 /* External DMA Request */ | 1260 | #define GPIO20_DREQ0 20 /* External DMA Request */ |
| @@ -1295,14 +1297,20 @@ | |||
| 1295 | #define GPIO48_nPOE 48 /* Output Enable for Card Space */ | 1297 | #define GPIO48_nPOE 48 /* Output Enable for Card Space */ |
| 1296 | #define GPIO49_nPWE 49 /* Write Enable for Card Space */ | 1298 | #define GPIO49_nPWE 49 /* Write Enable for Card Space */ |
| 1297 | #define GPIO50_nPIOR 50 /* I/O Read for Card Space */ | 1299 | #define GPIO50_nPIOR 50 /* I/O Read for Card Space */ |
| 1300 | #define GPIO50_CIF_DD_3 50 /* Camera data pin 3 */ | ||
| 1298 | #define GPIO51_nPIOW 51 /* I/O Write for Card Space */ | 1301 | #define GPIO51_nPIOW 51 /* I/O Write for Card Space */ |
| 1302 | #define GPIO51_CIF_DD_2 51 /* Camera data pin 2 */ | ||
| 1299 | #define GPIO52_nPCE_1 52 /* Card Enable for Card Space */ | 1303 | #define GPIO52_nPCE_1 52 /* Card Enable for Card Space */ |
| 1304 | #define GPIO52_CIF_DD_4 52 /* Camera data pin 4 */ | ||
| 1300 | #define GPIO53_nPCE_2 53 /* Card Enable for Card Space */ | 1305 | #define GPIO53_nPCE_2 53 /* Card Enable for Card Space */ |
| 1301 | #define GPIO53_MMCCLK 53 /* MMC Clock */ | 1306 | #define GPIO53_MMCCLK 53 /* MMC Clock */ |
| 1307 | #define GPIO53_CIF_MCLK 53 /* Camera Master Clock */ | ||
| 1302 | #define GPIO54_MMCCLK 54 /* MMC Clock */ | 1308 | #define GPIO54_MMCCLK 54 /* MMC Clock */ |
| 1303 | #define GPIO54_pSKTSEL 54 /* Socket Select for Card Space */ | 1309 | #define GPIO54_pSKTSEL 54 /* Socket Select for Card Space */ |
| 1304 | #define GPIO54_nPCE_2 54 /* Card Enable for Card Space (PXA27x) */ | 1310 | #define GPIO54_nPCE_2 54 /* Card Enable for Card Space (PXA27x) */ |
| 1311 | #define GPIO54_CIF_PCLK 54 /* Camera Pixel Clock */ | ||
| 1305 | #define GPIO55_nPREG 55 /* Card Address bit 26 */ | 1312 | #define GPIO55_nPREG 55 /* Card Address bit 26 */ |
| 1313 | #define GPIO55_CIF_DD_1 55 /* Camera data pin 1 */ | ||
| 1306 | #define GPIO56_nPWAIT 56 /* Wait signal for Card Space */ | 1314 | #define GPIO56_nPWAIT 56 /* Wait signal for Card Space */ |
| 1307 | #define GPIO57_nIOIS16 57 /* Bus Width select for I/O Card Space */ | 1315 | #define GPIO57_nIOIS16 57 /* Bus Width select for I/O Card Space */ |
| 1308 | #define GPIO58_LDD_0 58 /* LCD data pin 0 */ | 1316 | #define GPIO58_LDD_0 58 /* LCD data pin 0 */ |
| @@ -1337,10 +1345,14 @@ | |||
| 1337 | #define GPIO79_nCS_3 79 /* chip select 3 */ | 1345 | #define GPIO79_nCS_3 79 /* chip select 3 */ |
| 1338 | #define GPIO80_nCS_4 80 /* chip select 4 */ | 1346 | #define GPIO80_nCS_4 80 /* chip select 4 */ |
| 1339 | #define GPIO81_NSCLK 81 /* NSSP clock */ | 1347 | #define GPIO81_NSCLK 81 /* NSSP clock */ |
| 1348 | #define GPIO81_CIF_DD_0 81 /* Camera data pin 0 */ | ||
| 1340 | #define GPIO82_NSFRM 82 /* NSSP Frame */ | 1349 | #define GPIO82_NSFRM 82 /* NSSP Frame */ |
| 1350 | #define GPIO82_CIF_DD_5 82 /* Camera data pin 5 */ | ||
| 1341 | #define GPIO83_NSTXD 83 /* NSSP transmit */ | 1351 | #define GPIO83_NSTXD 83 /* NSSP transmit */ |
| 1342 | #define GPIO84_NSRXD 84 /* NSSP receive */ | 1352 | #define GPIO84_NSRXD 84 /* NSSP receive */ |
| 1353 | #define GPIO84_CIF_FV 84 /* Camera frame start signal */ | ||
| 1343 | #define GPIO85_nPCE_1 85 /* Card Enable for Card Space (PXA27x) */ | 1354 | #define GPIO85_nPCE_1 85 /* Card Enable for Card Space (PXA27x) */ |
| 1355 | #define GPIO85_CIF_LV 85 /* Camera line start signal */ | ||
| 1344 | #define GPIO92_MMCDAT0 92 /* MMC DAT0 (PXA27x) */ | 1356 | #define GPIO92_MMCDAT0 92 /* MMC DAT0 (PXA27x) */ |
| 1345 | #define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */ | 1357 | #define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */ |
| 1346 | #define GPIO109_MMCDAT1 109 /* MMC DAT1 (PXA27x) */ | 1358 | #define GPIO109_MMCDAT1 109 /* MMC DAT1 (PXA27x) */ |
| @@ -1376,11 +1388,13 @@ | |||
| 1376 | #define GPIO10_RTCCLK_MD (10 | GPIO_ALT_FN_1_OUT) | 1388 | #define GPIO10_RTCCLK_MD (10 | GPIO_ALT_FN_1_OUT) |
| 1377 | #define GPIO11_3_6MHz_MD (11 | GPIO_ALT_FN_1_OUT) | 1389 | #define GPIO11_3_6MHz_MD (11 | GPIO_ALT_FN_1_OUT) |
| 1378 | #define GPIO12_32KHz_MD (12 | GPIO_ALT_FN_1_OUT) | 1390 | #define GPIO12_32KHz_MD (12 | GPIO_ALT_FN_1_OUT) |
| 1391 | #define GPIO12_CIF_DD_7_MD (12 | GPIO_ALT_FN_2_IN) | ||
| 1379 | #define GPIO13_MBGNT_MD (13 | GPIO_ALT_FN_2_OUT) | 1392 | #define GPIO13_MBGNT_MD (13 | GPIO_ALT_FN_2_OUT) |
| 1380 | #define GPIO14_MBREQ_MD (14 | GPIO_ALT_FN_1_IN) | 1393 | #define GPIO14_MBREQ_MD (14 | GPIO_ALT_FN_1_IN) |
| 1381 | #define GPIO15_nCS_1_MD (15 | GPIO_ALT_FN_2_OUT) | 1394 | #define GPIO15_nCS_1_MD (15 | GPIO_ALT_FN_2_OUT) |
| 1382 | #define GPIO16_PWM0_MD (16 | GPIO_ALT_FN_2_OUT) | 1395 | #define GPIO16_PWM0_MD (16 | GPIO_ALT_FN_2_OUT) |
| 1383 | #define GPIO17_PWM1_MD (17 | GPIO_ALT_FN_2_OUT) | 1396 | #define GPIO17_PWM1_MD (17 | GPIO_ALT_FN_2_OUT) |
| 1397 | #define GPIO17_CIF_DD_6_MD (17 | GPIO_ALT_FN_2_IN) | ||
| 1384 | #define GPIO18_RDY_MD (18 | GPIO_ALT_FN_1_IN) | 1398 | #define GPIO18_RDY_MD (18 | GPIO_ALT_FN_1_IN) |
| 1385 | #define GPIO19_DREQ1_MD (19 | GPIO_ALT_FN_1_IN) | 1399 | #define GPIO19_DREQ1_MD (19 | GPIO_ALT_FN_1_IN) |
| 1386 | #define GPIO20_DREQ0_MD (20 | GPIO_ALT_FN_1_IN) | 1400 | #define GPIO20_DREQ0_MD (20 | GPIO_ALT_FN_1_IN) |
| @@ -1400,11 +1414,12 @@ | |||
| 1400 | #define GPIO31_SYNC_AC97_MD (31 | GPIO_ALT_FN_2_OUT) | 1414 | #define GPIO31_SYNC_AC97_MD (31 | GPIO_ALT_FN_2_OUT) |
| 1401 | #define GPIO32_SDATA_IN1_AC97_MD (32 | GPIO_ALT_FN_1_IN) | 1415 | #define GPIO32_SDATA_IN1_AC97_MD (32 | GPIO_ALT_FN_1_IN) |
| 1402 | #define GPIO32_SYSCLK_I2S_MD (32 | GPIO_ALT_FN_1_OUT) | 1416 | #define GPIO32_SYSCLK_I2S_MD (32 | GPIO_ALT_FN_1_OUT) |
| 1403 | #define GPIO32_MMCCLK_MD ( 32 | GPIO_ALT_FN_2_OUT) | 1417 | #define GPIO32_MMCCLK_MD (32 | GPIO_ALT_FN_2_OUT) |
| 1404 | #define GPIO33_nCS_5_MD (33 | GPIO_ALT_FN_2_OUT) | 1418 | #define GPIO33_nCS_5_MD (33 | GPIO_ALT_FN_2_OUT) |
| 1405 | #define GPIO34_FFRXD_MD (34 | GPIO_ALT_FN_1_IN) | 1419 | #define GPIO34_FFRXD_MD (34 | GPIO_ALT_FN_1_IN) |
| 1406 | #define GPIO34_MMCCS0_MD (34 | GPIO_ALT_FN_2_OUT) | 1420 | #define GPIO34_MMCCS0_MD (34 | GPIO_ALT_FN_2_OUT) |
| 1407 | #define GPIO35_FFCTS_MD (35 | GPIO_ALT_FN_1_IN) | 1421 | #define GPIO35_FFCTS_MD (35 | GPIO_ALT_FN_1_IN) |
| 1422 | #define GPIO35_KP_MKOUT6_MD (35 | GPIO_ALT_FN_2_OUT) | ||
| 1408 | #define GPIO36_FFDCD_MD (36 | GPIO_ALT_FN_1_IN) | 1423 | #define GPIO36_FFDCD_MD (36 | GPIO_ALT_FN_1_IN) |
| 1409 | #define GPIO37_FFDSR_MD (37 | GPIO_ALT_FN_1_IN) | 1424 | #define GPIO37_FFDSR_MD (37 | GPIO_ALT_FN_1_IN) |
| 1410 | #define GPIO38_FFRI_MD (38 | GPIO_ALT_FN_1_IN) | 1425 | #define GPIO38_FFRI_MD (38 | GPIO_ALT_FN_1_IN) |
| @@ -1412,6 +1427,7 @@ | |||
| 1412 | #define GPIO39_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT) | 1427 | #define GPIO39_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT) |
| 1413 | #define GPIO40_FFDTR_MD (40 | GPIO_ALT_FN_2_OUT) | 1428 | #define GPIO40_FFDTR_MD (40 | GPIO_ALT_FN_2_OUT) |
| 1414 | #define GPIO41_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) | 1429 | #define GPIO41_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) |
| 1430 | #define GPIO41_KP_MKOUT7_MD (41 | GPIO_ALT_FN_1_OUT) | ||
| 1415 | #define GPIO42_BTRXD_MD (42 | GPIO_ALT_FN_1_IN) | 1431 | #define GPIO42_BTRXD_MD (42 | GPIO_ALT_FN_1_IN) |
| 1416 | #define GPIO42_HWRXD_MD (42 | GPIO_ALT_FN_3_IN) | 1432 | #define GPIO42_HWRXD_MD (42 | GPIO_ALT_FN_3_IN) |
| 1417 | #define GPIO43_BTTXD_MD (43 | GPIO_ALT_FN_2_OUT) | 1433 | #define GPIO43_BTTXD_MD (43 | GPIO_ALT_FN_2_OUT) |
| @@ -1420,27 +1436,33 @@ | |||
| 1420 | #define GPIO44_HWCTS_MD (44 | GPIO_ALT_FN_3_IN) | 1436 | #define GPIO44_HWCTS_MD (44 | GPIO_ALT_FN_3_IN) |
| 1421 | #define GPIO45_BTRTS_MD (45 | GPIO_ALT_FN_2_OUT) | 1437 | #define GPIO45_BTRTS_MD (45 | GPIO_ALT_FN_2_OUT) |
| 1422 | #define GPIO45_HWRTS_MD (45 | GPIO_ALT_FN_3_OUT) | 1438 | #define GPIO45_HWRTS_MD (45 | GPIO_ALT_FN_3_OUT) |
| 1423 | #define GPIO45_SYSCLK_AC97_MD (45 | GPIO_ALT_FN_1_OUT) | 1439 | #define GPIO45_SYSCLK_AC97_MD (45 | GPIO_ALT_FN_1_OUT) |
| 1424 | #define GPIO46_ICPRXD_MD (46 | GPIO_ALT_FN_1_IN) | 1440 | #define GPIO46_ICPRXD_MD (46 | GPIO_ALT_FN_1_IN) |
| 1425 | #define GPIO46_STRXD_MD (46 | GPIO_ALT_FN_2_IN) | 1441 | #define GPIO46_STRXD_MD (46 | GPIO_ALT_FN_2_IN) |
| 1426 | #define GPIO47_ICPTXD_MD (47 | GPIO_ALT_FN_2_OUT) | 1442 | #define GPIO47_ICPTXD_MD (47 | GPIO_ALT_FN_2_OUT) |
| 1427 | #define GPIO47_STTXD_MD (47 | GPIO_ALT_FN_1_OUT) | 1443 | #define GPIO47_STTXD_MD (47 | GPIO_ALT_FN_1_OUT) |
| 1428 | #define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT) | 1444 | #define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT) |
| 1429 | #define GPIO48_HWTXD_MD (48 | GPIO_ALT_FN_1_OUT) | 1445 | #define GPIO48_HWTXD_MD (48 | GPIO_ALT_FN_1_OUT) |
| 1430 | #define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT) | 1446 | #define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT) |
| 1431 | #define GPIO49_HWRXD_MD (49 | GPIO_ALT_FN_1_IN) | 1447 | #define GPIO49_HWRXD_MD (49 | GPIO_ALT_FN_1_IN) |
| 1432 | #define GPIO49_nPWE_MD (49 | GPIO_ALT_FN_2_OUT) | 1448 | #define GPIO49_nPWE_MD (49 | GPIO_ALT_FN_2_OUT) |
| 1433 | #define GPIO50_nPIOR_MD (50 | GPIO_ALT_FN_2_OUT) | 1449 | #define GPIO50_nPIOR_MD (50 | GPIO_ALT_FN_2_OUT) |
| 1434 | #define GPIO50_HWCTS_MD (50 | GPIO_ALT_FN_1_IN) | 1450 | #define GPIO50_HWCTS_MD (50 | GPIO_ALT_FN_1_IN) |
| 1435 | #define GPIO51_HWRTS_MD (51 | GPIO_ALT_FN_1_OUT) | 1451 | #define GPIO50_CIF_DD_3_MD (50 | GPIO_ALT_FN_1_IN) |
| 1436 | #define GPIO51_nPIOW_MD (51 | GPIO_ALT_FN_2_OUT) | 1452 | #define GPIO51_nPIOW_MD (51 | GPIO_ALT_FN_2_OUT) |
| 1453 | #define GPIO51_HWRTS_MD (51 | GPIO_ALT_FN_1_OUT) | ||
| 1454 | #define GPIO51_CIF_DD_2_MD (51 | GPIO_ALT_FN_1_IN) | ||
| 1437 | #define GPIO52_nPCE_1_MD (52 | GPIO_ALT_FN_2_OUT) | 1455 | #define GPIO52_nPCE_1_MD (52 | GPIO_ALT_FN_2_OUT) |
| 1456 | #define GPIO52_CIF_DD_4_MD (52 | GPIO_ALT_FN_1_IN) | ||
| 1438 | #define GPIO53_nPCE_2_MD (53 | GPIO_ALT_FN_2_OUT) | 1457 | #define GPIO53_nPCE_2_MD (53 | GPIO_ALT_FN_2_OUT) |
| 1439 | #define GPIO53_MMCCLK_MD (53 | GPIO_ALT_FN_1_OUT) | 1458 | #define GPIO53_MMCCLK_MD (53 | GPIO_ALT_FN_1_OUT) |
| 1459 | #define GPIO53_CIF_MCLK_MD (53 | GPIO_ALT_FN_2_OUT) | ||
| 1440 | #define GPIO54_MMCCLK_MD (54 | GPIO_ALT_FN_1_OUT) | 1460 | #define GPIO54_MMCCLK_MD (54 | GPIO_ALT_FN_1_OUT) |
| 1441 | #define GPIO54_nPCE_2_MD (54 | GPIO_ALT_FN_2_OUT) | 1461 | #define GPIO54_nPCE_2_MD (54 | GPIO_ALT_FN_2_OUT) |
| 1442 | #define GPIO54_pSKTSEL_MD (54 | GPIO_ALT_FN_2_OUT) | 1462 | #define GPIO54_pSKTSEL_MD (54 | GPIO_ALT_FN_2_OUT) |
| 1463 | #define GPIO54_CIF_PCLK_MD (54 | GPIO_ALT_FN_3_IN) | ||
| 1443 | #define GPIO55_nPREG_MD (55 | GPIO_ALT_FN_2_OUT) | 1464 | #define GPIO55_nPREG_MD (55 | GPIO_ALT_FN_2_OUT) |
| 1465 | #define GPIO55_CIF_DD_1_MD (55 | GPIO_ALT_FN_1_IN) | ||
| 1444 | #define GPIO56_nPWAIT_MD (56 | GPIO_ALT_FN_1_IN) | 1466 | #define GPIO56_nPWAIT_MD (56 | GPIO_ALT_FN_1_IN) |
| 1445 | #define GPIO57_nIOIS16_MD (57 | GPIO_ALT_FN_1_IN) | 1467 | #define GPIO57_nIOIS16_MD (57 | GPIO_ALT_FN_1_IN) |
| 1446 | #define GPIO58_LDD_0_MD (58 | GPIO_ALT_FN_2_OUT) | 1468 | #define GPIO58_LDD_0_MD (58 | GPIO_ALT_FN_2_OUT) |
| @@ -1472,21 +1494,39 @@ | |||
| 1472 | #define GPIO76_LCD_PCLK_MD (76 | GPIO_ALT_FN_2_OUT) | 1494 | #define GPIO76_LCD_PCLK_MD (76 | GPIO_ALT_FN_2_OUT) |
| 1473 | #define GPIO77_LCD_ACBIAS_MD (77 | GPIO_ALT_FN_2_OUT) | 1495 | #define GPIO77_LCD_ACBIAS_MD (77 | GPIO_ALT_FN_2_OUT) |
| 1474 | #define GPIO78_nCS_2_MD (78 | GPIO_ALT_FN_2_OUT) | 1496 | #define GPIO78_nCS_2_MD (78 | GPIO_ALT_FN_2_OUT) |
| 1497 | #define GPIO78_nPCE_2_MD (78 | GPIO_ALT_FN_1_OUT) | ||
| 1475 | #define GPIO79_nCS_3_MD (79 | GPIO_ALT_FN_2_OUT) | 1498 | #define GPIO79_nCS_3_MD (79 | GPIO_ALT_FN_2_OUT) |
| 1476 | #define GPIO79_pSKTSEL_MD (79 | GPIO_ALT_FN_1_OUT) | 1499 | #define GPIO79_pSKTSEL_MD (79 | GPIO_ALT_FN_1_OUT) |
| 1477 | #define GPIO80_nCS_4_MD (80 | GPIO_ALT_FN_2_OUT) | 1500 | #define GPIO80_nCS_4_MD (80 | GPIO_ALT_FN_2_OUT) |
| 1478 | #define GPIO81_NSSP_CLK_OUT (81 | GPIO_ALT_FN_1_OUT) | 1501 | #define GPIO81_NSSP_CLK_OUT (81 | GPIO_ALT_FN_1_OUT) |
| 1479 | #define GPIO81_NSSP_CLK_IN (81 | GPIO_ALT_FN_1_IN) | 1502 | #define GPIO81_NSSP_CLK_IN (81 | GPIO_ALT_FN_1_IN) |
| 1480 | #define GPIO82_NSSP_FRM_OUT (82 | GPIO_ALT_FN_1_OUT) | 1503 | #define GPIO81_CIF_DD_0_MD (81 | GPIO_ALT_FN_2_IN) |
| 1481 | #define GPIO82_NSSP_FRM_IN (82 | GPIO_ALT_FN_1_IN) | 1504 | #define GPIO82_NSSP_FRM_OUT (82 | GPIO_ALT_FN_1_OUT) |
| 1482 | #define GPIO83_NSSP_TX (83 | GPIO_ALT_FN_1_OUT) | 1505 | #define GPIO82_NSSP_FRM_IN (82 | GPIO_ALT_FN_1_IN) |
| 1483 | #define GPIO83_NSSP_RX (83 | GPIO_ALT_FN_2_IN) | 1506 | #define GPIO82_CIF_DD_5_MD (82 | GPIO_ALT_FN_3_IN) |
| 1484 | #define GPIO84_NSSP_TX (84 | GPIO_ALT_FN_1_OUT) | 1507 | #define GPIO83_NSSP_TX (83 | GPIO_ALT_FN_1_OUT) |
| 1485 | #define GPIO84_NSSP_RX (84 | GPIO_ALT_FN_2_IN) | 1508 | #define GPIO83_NSSP_RX (83 | GPIO_ALT_FN_2_IN) |
| 1509 | #define GPIO84_NSSP_TX (84 | GPIO_ALT_FN_1_OUT) | ||
| 1510 | #define GPIO84_NSSP_RX (84 | GPIO_ALT_FN_2_IN) | ||
| 1511 | #define GPIO84_CIF_FV_MD (84 | GPIO_ALT_FN_3_IN) | ||
| 1486 | #define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT) | 1512 | #define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT) |
| 1513 | #define GPIO85_CIF_LV_MD (85 | GPIO_ALT_FN_3_IN) | ||
| 1514 | #define GPIO86_nPCE_1_MD (86 | GPIO_ALT_FN_1_OUT) | ||
| 1487 | #define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT) | 1515 | #define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT) |
| 1516 | #define GPIO95_KP_MKIN6_MD (95 | GPIO_ALT_FN_3_IN) | ||
| 1517 | #define GPIO96_KP_DKIN3_MD (96 | GPIO_ALT_FN_1_IN) | ||
| 1518 | #define GPIO97_KP_MKIN3_MD (97 | GPIO_ALT_FN_3_IN) | ||
| 1519 | #define GPIO100_KP_MKIN0_MD (100 | GPIO_ALT_FN_1_IN) | ||
| 1520 | #define GPIO101_KP_MKIN1_MD (101 | GPIO_ALT_FN_1_IN) | ||
| 1488 | #define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT) | 1521 | #define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT) |
| 1522 | #define GPIO102_KP_MKIN2_MD (102 | GPIO_ALT_FN_1_IN) | ||
| 1523 | #define GPIO103_KP_MKOUT0_MD (103 | GPIO_ALT_FN_2_OUT) | ||
| 1489 | #define GPIO104_pSKTSEL_MD (104 | GPIO_ALT_FN_1_OUT) | 1524 | #define GPIO104_pSKTSEL_MD (104 | GPIO_ALT_FN_1_OUT) |
| 1525 | #define GPIO104_KP_MKOUT1_MD (104 | GPIO_ALT_FN_2_OUT) | ||
| 1526 | #define GPIO105_KP_MKOUT2_MD (105 | GPIO_ALT_FN_2_OUT) | ||
| 1527 | #define GPIO106_KP_MKOUT3_MD (106 | GPIO_ALT_FN_2_OUT) | ||
| 1528 | #define GPIO107_KP_MKOUT4_MD (107 | GPIO_ALT_FN_2_OUT) | ||
| 1529 | #define GPIO108_KP_MKOUT5_MD (108 | GPIO_ALT_FN_2_OUT) | ||
| 1490 | #define GPIO109_MMCDAT1_MD (109 | GPIO_ALT_FN_1_OUT) | 1530 | #define GPIO109_MMCDAT1_MD (109 | GPIO_ALT_FN_1_OUT) |
| 1491 | #define GPIO110_MMCDAT2_MD (110 | GPIO_ALT_FN_1_OUT) | 1531 | #define GPIO110_MMCDAT2_MD (110 | GPIO_ALT_FN_1_OUT) |
| 1492 | #define GPIO110_MMCCS0_MD (110 | GPIO_ALT_FN_1_OUT) | 1532 | #define GPIO110_MMCCS0_MD (110 | GPIO_ALT_FN_1_OUT) |