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authorIngo Molnar <mingo@elte.hu>2008-07-06 08:23:39 -0400
committerIngo Molnar <mingo@elte.hu>2008-07-06 08:23:39 -0400
commit68083e05d72d94f347293d8cc0067050ba904bfa (patch)
tree842e71365bd90866be7add181661a4039d891564 /include/asm-arm/arch-pxa/regs-lcd.h
parent7baac8b91f9871ba8cb09af84de4ae1d86d07812 (diff)
parentb7279469d66b55119784b8b9529c99c1955fe747 (diff)
Merge commit 'v2.6.26-rc9' into cpus4096
Diffstat (limited to 'include/asm-arm/arch-pxa/regs-lcd.h')
-rw-r--r--include/asm-arm/arch-pxa/regs-lcd.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/include/asm-arm/arch-pxa/regs-lcd.h b/include/asm-arm/arch-pxa/regs-lcd.h
index f762493f5141..3ba464c913a5 100644
--- a/include/asm-arm/arch-pxa/regs-lcd.h
+++ b/include/asm-arm/arch-pxa/regs-lcd.h
@@ -1,5 +1,8 @@
1#ifndef __ASM_ARCH_REGS_LCD_H 1#ifndef __ASM_ARCH_REGS_LCD_H
2#define __ASM_ARCH_REGS_LCD_H 2#define __ASM_ARCH_REGS_LCD_H
3
4#include <asm/arch/bitfield.h>
5
3/* 6/*
4 * LCD Controller Registers and Bits Definitions 7 * LCD Controller Registers and Bits Definitions
5 */ 8 */
@@ -69,7 +72,7 @@
69#define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */ 72#define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */
70#define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */ 73#define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */
71#define LCCR0_PDD_S 12 74#define LCCR0_PDD_S 12
72#define LCCR0_BM (1 << 20) /* Branch mask */ 75#define LCCR0_BM (1 << 20) /* Branch mask */
73#define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ 76#define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */
74#define LCCR0_LCDT (1 << 22) /* LCD panel type */ 77#define LCCR0_LCDT (1 << 22) /* LCD panel type */
75#define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */ 78#define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */