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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-07-09 16:34:25 -0400 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-07-09 16:34:25 -0400 |
| commit | f974a8ec96571535ee07880a023bcce0e3f2c76b (patch) | |
| tree | 5cf09207b1ad292a55275cd0b24999fa29b9dfe8 /include/asm-arm/arch-pxa/regs-lcd.h | |
| parent | c0b8556f2f8146bd38324b14b1ce00f249ba8ed9 (diff) | |
| parent | 4ed47896935573c8423d05bddda3f269d6e6c613 (diff) | |
Merge branch 'machtypes' into pxa-palm
Diffstat (limited to 'include/asm-arm/arch-pxa/regs-lcd.h')
| -rw-r--r-- | include/asm-arm/arch-pxa/regs-lcd.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/include/asm-arm/arch-pxa/regs-lcd.h b/include/asm-arm/arch-pxa/regs-lcd.h index f762493f5141..3ba464c913a5 100644 --- a/include/asm-arm/arch-pxa/regs-lcd.h +++ b/include/asm-arm/arch-pxa/regs-lcd.h | |||
| @@ -1,5 +1,8 @@ | |||
| 1 | #ifndef __ASM_ARCH_REGS_LCD_H | 1 | #ifndef __ASM_ARCH_REGS_LCD_H |
| 2 | #define __ASM_ARCH_REGS_LCD_H | 2 | #define __ASM_ARCH_REGS_LCD_H |
| 3 | |||
| 4 | #include <asm/arch/bitfield.h> | ||
| 5 | |||
| 3 | /* | 6 | /* |
| 4 | * LCD Controller Registers and Bits Definitions | 7 | * LCD Controller Registers and Bits Definitions |
| 5 | */ | 8 | */ |
| @@ -69,7 +72,7 @@ | |||
| 69 | #define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */ | 72 | #define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */ |
| 70 | #define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */ | 73 | #define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */ |
| 71 | #define LCCR0_PDD_S 12 | 74 | #define LCCR0_PDD_S 12 |
| 72 | #define LCCR0_BM (1 << 20) /* Branch mask */ | 75 | #define LCCR0_BM (1 << 20) /* Branch mask */ |
| 73 | #define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ | 76 | #define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ |
| 74 | #define LCCR0_LCDT (1 << 22) /* LCD panel type */ | 77 | #define LCCR0_LCDT (1 << 22) /* LCD panel type */ |
| 75 | #define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */ | 78 | #define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */ |