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author | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2006-06-10 14:47:26 -0400 |
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committer | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2006-06-10 14:47:26 -0400 |
commit | f0cd91a68acdc9b49d7f6738b514a426da627649 (patch) | |
tree | 8ad73564015794197583b094217ae0a71e71e753 /include/asm-arm/arch-pxa/pxa2xx_spi.h | |
parent | 60eef25701d25e99c991dd0f4a9f3832a0c3ad3e (diff) | |
parent | 128e6ced247cda88f96fa9f2e4ba8b2c4a681560 (diff) |
Merge ../linux-2.6
Diffstat (limited to 'include/asm-arm/arch-pxa/pxa2xx_spi.h')
-rw-r--r-- | include/asm-arm/arch-pxa/pxa2xx_spi.h | 71 |
1 files changed, 71 insertions, 0 deletions
diff --git a/include/asm-arm/arch-pxa/pxa2xx_spi.h b/include/asm-arm/arch-pxa/pxa2xx_spi.h new file mode 100644 index 000000000000..915590c391c8 --- /dev/null +++ b/include/asm-arm/arch-pxa/pxa2xx_spi.h | |||
@@ -0,0 +1,71 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2005 Stephen Street / StreetFire Sound Labs | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
17 | */ | ||
18 | |||
19 | #ifndef PXA2XX_SPI_H_ | ||
20 | #define PXA2XX_SPI_H_ | ||
21 | |||
22 | #define PXA2XX_CS_ASSERT (0x01) | ||
23 | #define PXA2XX_CS_DEASSERT (0x02) | ||
24 | |||
25 | #if defined(CONFIG_PXA25x) | ||
26 | #define CLOCK_SPEED_HZ 3686400 | ||
27 | #define SSP1_SerClkDiv(x) (((CLOCK_SPEED_HZ/2/(x+1))<<8)&0x0000ff00) | ||
28 | #define SSP2_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00) | ||
29 | #define SSP3_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00) | ||
30 | #define SSP_TIMEOUT_SCALE (2712) | ||
31 | #elif defined(CONFIG_PXA27x) | ||
32 | #define CLOCK_SPEED_HZ 13000000 | ||
33 | #define SSP1_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00) | ||
34 | #define SSP2_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00) | ||
35 | #define SSP3_SerClkDiv(x) (((CLOCK_SPEED_HZ/(x+1))<<8)&0x000fff00) | ||
36 | #define SSP_TIMEOUT_SCALE (769) | ||
37 | #endif | ||
38 | |||
39 | #define SSP_TIMEOUT(x) ((x*10000)/SSP_TIMEOUT_SCALE) | ||
40 | #define SSP1_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(1))))) | ||
41 | #define SSP2_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(2))))) | ||
42 | #define SSP3_VIRT ((void *)(io_p2v(__PREG(SSCR0_P(3))))) | ||
43 | |||
44 | enum pxa_ssp_type { | ||
45 | SSP_UNDEFINED = 0, | ||
46 | PXA25x_SSP, /* pxa 210, 250, 255, 26x */ | ||
47 | PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */ | ||
48 | PXA27x_SSP, | ||
49 | }; | ||
50 | |||
51 | /* device.platform_data for SSP controller devices */ | ||
52 | struct pxa2xx_spi_master { | ||
53 | enum pxa_ssp_type ssp_type; | ||
54 | u32 clock_enable; | ||
55 | u16 num_chipselect; | ||
56 | u8 enable_dma; | ||
57 | }; | ||
58 | |||
59 | /* spi_board_info.controller_data for SPI slave devices, | ||
60 | * copied to spi_device.platform_data ... mostly for dma tuning | ||
61 | */ | ||
62 | struct pxa2xx_spi_chip { | ||
63 | u8 tx_threshold; | ||
64 | u8 rx_threshold; | ||
65 | u8 dma_burst_size; | ||
66 | u32 timeout_microsecs; | ||
67 | u8 enable_loopback; | ||
68 | void (*cs_control)(u32 command); | ||
69 | }; | ||
70 | |||
71 | #endif /*PXA2XX_SPI_H_*/ | ||