[ARM] 4672/1: pxa: fix DRCMR(n) to support PXA27x and later processors

Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 4 insertions, 1 deletions

diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index bb68b598c436..6b33df6f1995 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -110,7 +110,10 @@
 #define DALGN           __REG(0x400000a0)  /* DMA Alignment Register */
 #define DINT            __REG(0x400000f0)  /* DMA Interrupt Register */
 
-#define DRCMR(n)        __REG2(0x40000100, (n)<<2)
+#define DRCMR(n)        (*(((n) < 64) ? \
+                        &__REG2(0x40000100, ((n) & 0x3f) << 2) : \
+                        &__REG2(0x40001100, ((n) & 0x3f) << 2)))
+
 #define DRCMR0          __REG(0x40000100)  /* Request to Channel Map Register for DREQ 0 */
 #define DRCMR1          __REG(0x40000104)  /* Request to Channel Map Register for DREQ 1 */
 #define DRCMR2          __REG(0x40000108)  /* Request to Channel Map Register for I2S receive Request */