diff options
author | Tony Luck <tony.luck@intel.com> | 2005-10-20 13:41:44 -0400 |
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committer | Tony Luck <tony.luck@intel.com> | 2005-10-20 13:41:44 -0400 |
commit | 9cec58dc138d6fcad9f447a19c8ff69f6540e667 (patch) | |
tree | 4fe1cca94fdba8b705c87615bee06d3346f687ce /include/asm-arm/arch-pxa/pxa-regs.h | |
parent | 17e5ad6c0ce5a970e2830d0de8bdd60a2f077d38 (diff) | |
parent | ac9b9c667c2e1194e22ebe0a441ae1c37aaa9b90 (diff) |
Update from upstream with manual merge of Yasunori Goto's
changes to swiotlb.c made in commit 281dd25cdc0d6903929b79183816d151ea626341
since this file has been moved from arch/ia64/lib/swiotlb.c to
lib/swiotlb.c
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'include/asm-arm/arch-pxa/pxa-regs.h')
-rw-r--r-- | include/asm-arm/arch-pxa/pxa-regs.h | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index 939d9e5020a0..3af7165ab0d7 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h | |||
@@ -126,8 +126,8 @@ | |||
126 | #define DRCMR12 __REG(0x40000130) /* Request to Channel Map Register for AC97 audio transmit Request */ | 126 | #define DRCMR12 __REG(0x40000130) /* Request to Channel Map Register for AC97 audio transmit Request */ |
127 | #define DRCMR13 __REG(0x40000134) /* Request to Channel Map Register for SSP receive Request */ | 127 | #define DRCMR13 __REG(0x40000134) /* Request to Channel Map Register for SSP receive Request */ |
128 | #define DRCMR14 __REG(0x40000138) /* Request to Channel Map Register for SSP transmit Request */ | 128 | #define DRCMR14 __REG(0x40000138) /* Request to Channel Map Register for SSP transmit Request */ |
129 | #define DRCMR15 __REG(0x4000013c) /* Reserved */ | 129 | #define DRCMR15 __REG(0x4000013c) /* Request to Channel Map Register for SSP2 receive Request */ |
130 | #define DRCMR16 __REG(0x40000140) /* Reserved */ | 130 | #define DRCMR16 __REG(0x40000140) /* Request to Channel Map Register for SSP2 transmit Request */ |
131 | #define DRCMR17 __REG(0x40000144) /* Request to Channel Map Register for ICP receive Request */ | 131 | #define DRCMR17 __REG(0x40000144) /* Request to Channel Map Register for ICP receive Request */ |
132 | #define DRCMR18 __REG(0x40000148) /* Request to Channel Map Register for ICP transmit Request */ | 132 | #define DRCMR18 __REG(0x40000148) /* Request to Channel Map Register for ICP transmit Request */ |
133 | #define DRCMR19 __REG(0x4000014c) /* Request to Channel Map Register for STUART receive Request */ | 133 | #define DRCMR19 __REG(0x4000014c) /* Request to Channel Map Register for STUART receive Request */ |
@@ -151,7 +151,8 @@ | |||
151 | #define DRCMR37 __REG(0x40000194) /* Request to Channel Map Register for USB endpoint 13 Request */ | 151 | #define DRCMR37 __REG(0x40000194) /* Request to Channel Map Register for USB endpoint 13 Request */ |
152 | #define DRCMR38 __REG(0x40000198) /* Request to Channel Map Register for USB endpoint 14 Request */ | 152 | #define DRCMR38 __REG(0x40000198) /* Request to Channel Map Register for USB endpoint 14 Request */ |
153 | #define DRCMR39 __REG(0x4000019C) /* Reserved */ | 153 | #define DRCMR39 __REG(0x4000019C) /* Reserved */ |
154 | 154 | #define DRCMR66 __REG(0x40001108) /* Request to Channel Map Register for SSP3 receive Request */ | |
155 | #define DRCMR67 __REG(0x4000110C) /* Request to Channel Map Register for SSP3 transmit Request */ | ||
155 | #define DRCMR68 __REG(0x40001110) /* Request to Channel Map Register for Camera FIFO 0 Request */ | 156 | #define DRCMR68 __REG(0x40001110) /* Request to Channel Map Register for Camera FIFO 0 Request */ |
156 | #define DRCMR69 __REG(0x40001114) /* Request to Channel Map Register for Camera FIFO 1 Request */ | 157 | #define DRCMR69 __REG(0x40001114) /* Request to Channel Map Register for Camera FIFO 1 Request */ |
157 | #define DRCMR70 __REG(0x40001118) /* Request to Channel Map Register for Camera FIFO 2 Request */ | 158 | #define DRCMR70 __REG(0x40001118) /* Request to Channel Map Register for Camera FIFO 2 Request */ |
@@ -652,7 +653,7 @@ | |||
652 | 653 | ||
653 | #define UDCCS_IO_RFS (1 << 0) /* Receive FIFO service */ | 654 | #define UDCCS_IO_RFS (1 << 0) /* Receive FIFO service */ |
654 | #define UDCCS_IO_RPC (1 << 1) /* Receive packet complete */ | 655 | #define UDCCS_IO_RPC (1 << 1) /* Receive packet complete */ |
655 | #define UDCCS_IO_ROF (1 << 3) /* Receive overflow */ | 656 | #define UDCCS_IO_ROF (1 << 2) /* Receive overflow */ |
656 | #define UDCCS_IO_DME (1 << 3) /* DMA enable */ | 657 | #define UDCCS_IO_DME (1 << 3) /* DMA enable */ |
657 | #define UDCCS_IO_RNE (1 << 6) /* Receive FIFO not empty */ | 658 | #define UDCCS_IO_RNE (1 << 6) /* Receive FIFO not empty */ |
658 | #define UDCCS_IO_RSP (1 << 7) /* Receive short packet */ | 659 | #define UDCCS_IO_RSP (1 << 7) /* Receive short packet */ |