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authorDavid Woodhouse <David.Woodhouse@intel.com>2008-07-25 10:40:14 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2008-07-25 10:40:14 -0400
commitff877ea80efa2015b6263766f78ee42c2a1b32f9 (patch)
tree85205005c611ab774702148558321c6fb92f1ccd /include/asm-arm/arch-orion5x/uncompress.h
parent30821fee4f0cb3e6d241d9f7ddc37742212e3eb7 (diff)
parentd37e6bf68fc1eb34a4ad21d9ae8890ed37ea80e7 (diff)
Merge branch 'linux-next' of git://git.infradead.org/~dedekind/ubi-2.6
Diffstat (limited to 'include/asm-arm/arch-orion5x/uncompress.h')
-rw-r--r--include/asm-arm/arch-orion5x/uncompress.h29
1 files changed, 22 insertions, 7 deletions
diff --git a/include/asm-arm/arch-orion5x/uncompress.h b/include/asm-arm/arch-orion5x/uncompress.h
index 5c13d4fafb4e..7548cedf2d76 100644
--- a/include/asm-arm/arch-orion5x/uncompress.h
+++ b/include/asm-arm/arch-orion5x/uncompress.h
@@ -8,23 +8,38 @@
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10 10
11#include <linux/serial_reg.h>
11#include <asm/arch/orion5x.h> 12#include <asm/arch/orion5x.h>
12 13
13#define MV_UART_THR ((volatile unsigned char *)(UART0_PHYS_BASE + 0x0)) 14#define SERIAL_BASE ((unsigned char *)UART0_PHYS_BASE)
14#define MV_UART_LSR ((volatile unsigned char *)(UART0_PHYS_BASE + 0x14))
15
16#define LSR_THRE 0x20
17 15
18static void putc(const char c) 16static void putc(const char c)
19{ 17{
20 int j = 0x1000; 18 unsigned char *base = SERIAL_BASE;
21 while (--j && !(*MV_UART_LSR & LSR_THRE)) 19 int i;
20
21 for (i = 0; i < 0x1000; i++) {
22 if (base[UART_LSR << 2] & UART_LSR_THRE)
23 break;
22 barrier(); 24 barrier();
23 *MV_UART_THR = c; 25 }
26
27 base[UART_TX << 2] = c;
24} 28}
25 29
26static void flush(void) 30static void flush(void)
27{ 31{
32 unsigned char *base = SERIAL_BASE;
33 unsigned char mask;
34 int i;
35
36 mask = UART_LSR_TEMT | UART_LSR_THRE;
37
38 for (i = 0; i < 0x1000; i++) {
39 if ((base[UART_LSR << 2] & mask) == mask)
40 break;
41 barrier();
42 }
28} 43}
29 44
30/* 45/*