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authorLinus Torvalds <torvalds@g5.osdl.org>2006-03-28 16:53:03 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-03-28 16:53:03 -0500
commitca9ba4471c1203bb6e759b76e83167fec54fe590 (patch)
tree8aeb359631742f77f635cb5ff785bea9132502f9 /include/asm-arm/arch-omap
parentd4965b3e2ff94d0c7b7e6e7e9794b54950a2f4b9 (diff)
parentc4713074375c61f939310b04e92090afe29810dc (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 3388/1: ixp23xx: add core ixp23xx support [ARM] 3417/1: add support for logicpd pxa270 card engine [ARM] 3387/1: ixp23xx: add defconfig [ARM] 3377/2: add support for intel xsc3 core [ARM] Move ice-dcc code into misc.c [ARM] Fix decompressor serial IO to give CRLF not LFCR [ARM] proc-v6: mark page table walks outer-cacheable, shared. Enable NX. [ARM] nommu: trivial patch for arch/arm/lib/Makefile [ARM] 3416/1: Update LART site URL [ARM] 3415/1: Akita: Add missing EXPORT_SYMBOL [ARM] 3414/1: ep93xx: reset ethernet controller before uncompressing
Diffstat (limited to 'include/asm-arm/arch-omap')
-rw-r--r--include/asm-arm/arch-omap/uncompress.h20
1 files changed, 8 insertions, 12 deletions
diff --git a/include/asm-arm/arch-omap/uncompress.h b/include/asm-arm/arch-omap/uncompress.h
index c718264affbd..ca2c8bec82e7 100644
--- a/include/asm-arm/arch-omap/uncompress.h
+++ b/include/asm-arm/arch-omap/uncompress.h
@@ -30,8 +30,7 @@ unsigned int system_rev;
30#define check_port(base, shift) ((base[UART_OMAP_MDR1 << shift] & 7) == 0) 30#define check_port(base, shift) ((base[UART_OMAP_MDR1 << shift] & 7) == 0)
31#define omap_get_id() ((*(volatile unsigned int *)(0xfffed404)) >> 12) & ID_MASK 31#define omap_get_id() ((*(volatile unsigned int *)(0xfffed404)) >> 12) & ID_MASK
32 32
33static void 33static void putc(int c)
34putstr(const char *s)
35{ 34{
36 volatile u8 * uart = 0; 35 volatile u8 * uart = 0;
37 int shift = 2; 36 int shift = 2;
@@ -69,16 +68,13 @@ putstr(const char *s)
69 /* 68 /*
70 * Now, xmit each character 69 * Now, xmit each character
71 */ 70 */
72 while (*s) { 71 while (!(uart[UART_LSR << shift] & UART_LSR_THRE))
73 while (!(uart[UART_LSR << shift] & UART_LSR_THRE)) 72 barrier();
74 barrier(); 73 uart[UART_TX << shift] = c;
75 uart[UART_TX << shift] = *s; 74}
76 if (*s++ == '\n') { 75
77 while (!(uart[UART_LSR << shift] & UART_LSR_THRE)) 76static inline void flush(void)
78 barrier(); 77{
79 uart[UART_TX << shift] = '\r';
80 }
81 }
82} 78}
83 79
84/* 80/*