diff options
author | Ingo Molnar <mingo@elte.hu> | 2008-07-18 15:13:20 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-07-18 15:13:20 -0400 |
commit | f6dc8ccaab6d8f63cbae1e6c73fe972b26f5376c (patch) | |
tree | c5643fcdc884a8d0bfc3f1bc28039cab7394e5bc /include/asm-arm/arch-omap/usb.h | |
parent | 323ec001c6bb98eeabb5abbdbb8c8055d9496554 (diff) | |
parent | 5b664cb235e97afbf34db9c4d77f08ebd725335e (diff) |
Merge branch 'linus' into core/generic-dma-coherent
Conflicts:
kernel/Makefile
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-arm/arch-omap/usb.h')
-rw-r--r-- | include/asm-arm/arch-omap/usb.h | 23 |
1 files changed, 10 insertions, 13 deletions
diff --git a/include/asm-arm/arch-omap/usb.h b/include/asm-arm/arch-omap/usb.h index 2147d18aaeae..ddf1861e6df9 100644 --- a/include/asm-arm/arch-omap/usb.h +++ b/include/asm-arm/arch-omap/usb.h | |||
@@ -34,11 +34,8 @@ | |||
34 | /* | 34 | /* |
35 | * OTG and transceiver registers, for OMAPs starting with ARM926 | 35 | * OTG and transceiver registers, for OMAPs starting with ARM926 |
36 | */ | 36 | */ |
37 | #define OTG_REG32(offset) __REG32(OTG_BASE + (offset)) | 37 | #define OTG_REV (OTG_BASE + 0x00) |
38 | #define OTG_REG16(offset) __REG16(OTG_BASE + (offset)) | 38 | #define OTG_SYSCON_1 (OTG_BASE + 0x04) |
39 | |||
40 | #define OTG_REV_REG OTG_REG32(0x00) | ||
41 | #define OTG_SYSCON_1_REG OTG_REG32(0x04) | ||
42 | # define USB2_TRX_MODE(w) (((w)>>24)&0x07) | 39 | # define USB2_TRX_MODE(w) (((w)>>24)&0x07) |
43 | # define USB1_TRX_MODE(w) (((w)>>20)&0x07) | 40 | # define USB1_TRX_MODE(w) (((w)>>20)&0x07) |
44 | # define USB0_TRX_MODE(w) (((w)>>16)&0x07) | 41 | # define USB0_TRX_MODE(w) (((w)>>16)&0x07) |
@@ -47,7 +44,7 @@ | |||
47 | # define DEV_IDLE_EN (1 << 13) | 44 | # define DEV_IDLE_EN (1 << 13) |
48 | # define OTG_RESET_DONE (1 << 2) | 45 | # define OTG_RESET_DONE (1 << 2) |
49 | # define OTG_SOFT_RESET (1 << 1) | 46 | # define OTG_SOFT_RESET (1 << 1) |
50 | #define OTG_SYSCON_2_REG OTG_REG32(0x08) | 47 | #define OTG_SYSCON_2 (OTG_BASE + 0x08) |
51 | # define OTG_EN (1 << 31) | 48 | # define OTG_EN (1 << 31) |
52 | # define USBX_SYNCHRO (1 << 30) | 49 | # define USBX_SYNCHRO (1 << 30) |
53 | # define OTG_MST16 (1 << 29) | 50 | # define OTG_MST16 (1 << 29) |
@@ -65,7 +62,7 @@ | |||
65 | # define HMC_TLLSPEED (1 << 7) | 62 | # define HMC_TLLSPEED (1 << 7) |
66 | # define HMC_TLLATTACH (1 << 6) | 63 | # define HMC_TLLATTACH (1 << 6) |
67 | # define OTG_HMC(w) (((w)>>0)&0x3f) | 64 | # define OTG_HMC(w) (((w)>>0)&0x3f) |
68 | #define OTG_CTRL_REG OTG_REG32(0x0c) | 65 | #define OTG_CTRL (OTG_BASE + 0x0c) |
69 | # define OTG_USB2_EN (1 << 29) | 66 | # define OTG_USB2_EN (1 << 29) |
70 | # define OTG_USB2_DP (1 << 28) | 67 | # define OTG_USB2_DP (1 << 28) |
71 | # define OTG_USB2_DM (1 << 27) | 68 | # define OTG_USB2_DM (1 << 27) |
@@ -92,7 +89,7 @@ | |||
92 | # define OTG_PD_VBUS (1 << 2) | 89 | # define OTG_PD_VBUS (1 << 2) |
93 | # define OTG_PU_VBUS (1 << 1) | 90 | # define OTG_PU_VBUS (1 << 1) |
94 | # define OTG_PU_ID (1 << 0) | 91 | # define OTG_PU_ID (1 << 0) |
95 | #define OTG_IRQ_EN_REG OTG_REG16(0x10) | 92 | #define OTG_IRQ_EN (OTG_BASE + 0x10) /* 16-bit */ |
96 | # define DRIVER_SWITCH (1 << 15) | 93 | # define DRIVER_SWITCH (1 << 15) |
97 | # define A_VBUS_ERR (1 << 13) | 94 | # define A_VBUS_ERR (1 << 13) |
98 | # define A_REQ_TMROUT (1 << 12) | 95 | # define A_REQ_TMROUT (1 << 12) |
@@ -102,9 +99,9 @@ | |||
102 | # define B_SRP_DONE (1 << 8) | 99 | # define B_SRP_DONE (1 << 8) |
103 | # define B_SRP_STARTED (1 << 7) | 100 | # define B_SRP_STARTED (1 << 7) |
104 | # define OPRT_CHG (1 << 0) | 101 | # define OPRT_CHG (1 << 0) |
105 | #define OTG_IRQ_SRC_REG OTG_REG16(0x14) | 102 | #define OTG_IRQ_SRC (OTG_BASE + 0x14) /* 16-bit */ |
106 | // same bits as in IRQ_EN | 103 | // same bits as in IRQ_EN |
107 | #define OTG_OUTCTRL_REG OTG_REG16(0x18) | 104 | #define OTG_OUTCTRL (OTG_BASE + 0x18) /* 16-bit */ |
108 | # define OTGVPD (1 << 14) | 105 | # define OTGVPD (1 << 14) |
109 | # define OTGVPU (1 << 13) | 106 | # define OTGVPU (1 << 13) |
110 | # define OTGPUID (1 << 12) | 107 | # define OTGPUID (1 << 12) |
@@ -117,13 +114,13 @@ | |||
117 | # define USB0VDR (1 << 2) | 114 | # define USB0VDR (1 << 2) |
118 | # define USB0PDEN (1 << 1) | 115 | # define USB0PDEN (1 << 1) |
119 | # define USB0PUEN (1 << 0) | 116 | # define USB0PUEN (1 << 0) |
120 | #define OTG_TEST_REG OTG_REG16(0x20) | 117 | #define OTG_TEST (OTG_BASE + 0x20) /* 16-bit */ |
121 | #define OTG_VENDOR_CODE_REG OTG_REG32(0xfc) | 118 | #define OTG_VENDOR_CODE (OTG_BASE + 0xfc) /* 16-bit */ |
122 | 119 | ||
123 | /*-------------------------------------------------------------------------*/ | 120 | /*-------------------------------------------------------------------------*/ |
124 | 121 | ||
125 | /* OMAP1 */ | 122 | /* OMAP1 */ |
126 | #define USB_TRANSCEIVER_CTRL_REG __REG32(0xfffe1000 + 0x0064) | 123 | #define USB_TRANSCEIVER_CTRL (0xfffe1000 + 0x0064) |
127 | # define CONF_USB2_UNI_R (1 << 8) | 124 | # define CONF_USB2_UNI_R (1 << 8) |
128 | # define CONF_USB1_UNI_R (1 << 7) | 125 | # define CONF_USB1_UNI_R (1 << 7) |
129 | # define CONF_USB_PORT0_R(x) (((x)>>4)&0x7) | 126 | # define CONF_USB_PORT0_R(x) (((x)>>4)&0x7) |