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author | Jeff Garzik <jgarzik@pobox.com> | 2005-11-11 05:51:24 -0500 |
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committer | Jeff Garzik <jgarzik@pobox.com> | 2005-11-11 05:51:24 -0500 |
commit | 3b621ee5df437d3f332a635ab6421aaa61a7dc2b (patch) | |
tree | c4a5236cee8eb7418770802313d36a55f1cc0b1e /include/asm-arm/arch-omap/system.h | |
parent | 7211bb9b64f17b23834d91fc3d0c1d78671ee9a8 (diff) | |
parent | 5e04e7fe774794b837e1d3897e6b96ae2d06679a (diff) |
Merge branch 'master'
Diffstat (limited to 'include/asm-arm/arch-omap/system.h')
-rw-r--r-- | include/asm-arm/arch-omap/system.h | 35 |
1 files changed, 28 insertions, 7 deletions
diff --git a/include/asm-arm/arch-omap/system.h b/include/asm-arm/arch-omap/system.h index ff37bc27e603..b43cdd2a3874 100644 --- a/include/asm-arm/arch-omap/system.h +++ b/include/asm-arm/arch-omap/system.h | |||
@@ -6,18 +6,21 @@ | |||
6 | #define __ASM_ARCH_SYSTEM_H | 6 | #define __ASM_ARCH_SYSTEM_H |
7 | #include <linux/config.h> | 7 | #include <linux/config.h> |
8 | #include <asm/mach-types.h> | 8 | #include <asm/mach-types.h> |
9 | #include <asm/hardware/clock.h> | ||
9 | #include <asm/arch/hardware.h> | 10 | #include <asm/arch/hardware.h> |
10 | #include <asm/mach-types.h> | 11 | #include <asm/arch/prcm.h> |
12 | |||
13 | #ifndef CONFIG_MACH_VOICEBLUE | ||
14 | #define voiceblue_reset() do {} while (0) | ||
15 | #endif | ||
11 | 16 | ||
12 | static inline void arch_idle(void) | 17 | static inline void arch_idle(void) |
13 | { | 18 | { |
14 | cpu_do_idle(); | 19 | cpu_do_idle(); |
15 | } | 20 | } |
16 | 21 | ||
17 | static inline void arch_reset(char mode) | 22 | static inline void omap1_arch_reset(char mode) |
18 | { | 23 | { |
19 | |||
20 | #ifdef CONFIG_ARCH_OMAP16XX | ||
21 | /* | 24 | /* |
22 | * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 | 25 | * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 |
23 | * "Global Software Reset Affects Traffic Controller Frequency". | 26 | * "Global Software Reset Affects Traffic Controller Frequency". |
@@ -27,13 +30,31 @@ static inline void arch_reset(char mode) | |||
27 | DPLL_CTL); | 30 | DPLL_CTL); |
28 | omap_writew(0x8, ARM_RSTCT1); | 31 | omap_writew(0x8, ARM_RSTCT1); |
29 | } | 32 | } |
30 | #endif | 33 | |
31 | #ifdef CONFIG_MACH_VOICEBLUE | ||
32 | if (machine_is_voiceblue()) | 34 | if (machine_is_voiceblue()) |
33 | voiceblue_reset(); | 35 | voiceblue_reset(); |
34 | else | 36 | else |
35 | #endif | ||
36 | omap_writew(1, ARM_RSTCT1); | 37 | omap_writew(1, ARM_RSTCT1); |
37 | } | 38 | } |
38 | 39 | ||
40 | static inline void omap2_arch_reset(char mode) | ||
41 | { | ||
42 | u32 rate; | ||
43 | struct clk *vclk, *sclk; | ||
44 | |||
45 | vclk = clk_get(NULL, "virt_prcm_set"); | ||
46 | sclk = clk_get(NULL, "sys_ck"); | ||
47 | rate = clk_get_rate(sclk); | ||
48 | clk_set_rate(vclk, rate); /* go to bypass for OMAP limitation */ | ||
49 | RM_RSTCTRL_WKUP |= 2; | ||
50 | } | ||
51 | |||
52 | static inline void arch_reset(char mode) | ||
53 | { | ||
54 | if (!cpu_is_omap24xx()) | ||
55 | omap1_arch_reset(mode); | ||
56 | else | ||
57 | omap2_arch_reset(mode); | ||
58 | } | ||
59 | |||
39 | #endif | 60 | #endif |