diff options
author | Jeff Garzik <jgarzik@pobox.com> | 2005-08-29 16:12:36 -0400 |
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committer | Jeff Garzik <jgarzik@pobox.com> | 2005-08-29 16:12:36 -0400 |
commit | 2fca877b68b2b4fc5b94277858a1bedd46017cde (patch) | |
tree | fd02725406299ba2f26354463b3c261721e9eb6b /include/asm-arm/arch-omap/omap16xx.h | |
parent | ff40c6d3d1437ecdf295b8e39adcb06c3d6021ef (diff) | |
parent | 02b3e4e2d71b6058ec11cc01c72ac651eb3ded2b (diff) |
/spare/repo/libata-dev branch 'v2.6.13'
Diffstat (limited to 'include/asm-arm/arch-omap/omap16xx.h')
-rw-r--r-- | include/asm-arm/arch-omap/omap16xx.h | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/include/asm-arm/arch-omap/omap16xx.h b/include/asm-arm/arch-omap/omap16xx.h index 88b1fe43ae9e..38a9b95e6a33 100644 --- a/include/asm-arm/arch-omap/omap16xx.h +++ b/include/asm-arm/arch-omap/omap16xx.h | |||
@@ -183,5 +183,37 @@ | |||
183 | #define OMAP16XX_PWL_ENABLE (OMAP16XX_PWL_BASE + 0x00) | 183 | #define OMAP16XX_PWL_ENABLE (OMAP16XX_PWL_BASE + 0x00) |
184 | #define OMAP16XX_PWL_CLK_ENABLE (OMAP16XX_PWL_BASE + 0x04) | 184 | #define OMAP16XX_PWL_CLK_ENABLE (OMAP16XX_PWL_BASE + 0x04) |
185 | 185 | ||
186 | /* | ||
187 | * --------------------------------------------------------------------------- | ||
188 | * Watchdog timer | ||
189 | * --------------------------------------------------------------------------- | ||
190 | */ | ||
191 | |||
192 | /* 32-bit Watchdog timer in OMAP 16XX */ | ||
193 | #define OMAP_16XX_WATCHDOG_BASE (0xfffeb000) | ||
194 | #define OMAP_16XX_WIDR (OMAP_16XX_WATCHDOG_BASE + 0x00) | ||
195 | #define OMAP_16XX_WD_SYSCONFIG (OMAP_16XX_WATCHDOG_BASE + 0x10) | ||
196 | #define OMAP_16XX_WD_SYSSTATUS (OMAP_16XX_WATCHDOG_BASE + 0x14) | ||
197 | #define OMAP_16XX_WCLR (OMAP_16XX_WATCHDOG_BASE + 0x24) | ||
198 | #define OMAP_16XX_WCRR (OMAP_16XX_WATCHDOG_BASE + 0x28) | ||
199 | #define OMAP_16XX_WLDR (OMAP_16XX_WATCHDOG_BASE + 0x2c) | ||
200 | #define OMAP_16XX_WTGR (OMAP_16XX_WATCHDOG_BASE + 0x30) | ||
201 | #define OMAP_16XX_WWPS (OMAP_16XX_WATCHDOG_BASE + 0x34) | ||
202 | #define OMAP_16XX_WSPR (OMAP_16XX_WATCHDOG_BASE + 0x48) | ||
203 | |||
204 | #define WCLR_PRE_SHIFT 5 | ||
205 | #define WCLR_PTV_SHIFT 2 | ||
206 | |||
207 | #define WWPS_W_PEND_WSPR (1 << 4) | ||
208 | #define WWPS_W_PEND_WTGR (1 << 3) | ||
209 | #define WWPS_W_PEND_WLDR (1 << 2) | ||
210 | #define WWPS_W_PEND_WCRR (1 << 1) | ||
211 | #define WWPS_W_PEND_WCLR (1 << 0) | ||
212 | |||
213 | #define WSPR_ENABLE_0 (0x0000bbbb) | ||
214 | #define WSPR_ENABLE_1 (0x00004444) | ||
215 | #define WSPR_DISABLE_0 (0x0000aaaa) | ||
216 | #define WSPR_DISABLE_1 (0x00005555) | ||
217 | |||
186 | #endif /* __ASM_ARCH_OMAP16XX_H */ | 218 | #endif /* __ASM_ARCH_OMAP16XX_H */ |
187 | 219 | ||