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authorTony Lindgren <tony@atomide.com>2006-04-02 12:46:22 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-04-02 12:46:22 -0400
commit8d7f9f5037a09b8570d0c9e60a924ad2ba6fa7dd (patch)
tree9a9513e45c86b4c520044a99561520756a6395c5 /include/asm-arm/arch-omap/mux.h
parenta569c6ec37e78eef4299d0a60ae4028459b27117 (diff)
[ARM] 3428/1: ARM: OMAP: 3/8 Update pin multiplexing
Patch from Tony Lindgren Update OMAP pin multiplexing code from linux-omap tree. This patch adds new pin configurations by various OMAP developers, and suport for omap730 by Brian Swetland. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-omap/mux.h')
-rw-r--r--include/asm-arm/arch-omap/mux.h54
1 files changed, 51 insertions, 3 deletions
diff --git a/include/asm-arm/arch-omap/mux.h b/include/asm-arm/arch-omap/mux.h
index 13415a9aab06..0dc24d4ba59c 100644
--- a/include/asm-arm/arch-omap/mux.h
+++ b/include/asm-arm/arch-omap/mux.h
@@ -112,14 +112,13 @@
112 * as mux config 112 * as mux config
113 */ 113 */
114#define MUX_CFG_730(desc, mux_reg, mode_offset, mode, \ 114#define MUX_CFG_730(desc, mux_reg, mode_offset, mode, \
115 pull_reg, pull_bit, pull_status, \ 115 pull_bit, pull_status, debug_status)\
116 pu_pd_reg, pu_pd_status, debug_status)\
117{ \ 116{ \
118 .name = desc, \ 117 .name = desc, \
119 .debug = debug_status, \ 118 .debug = debug_status, \
120 MUX_REG_730(mux_reg, mode_offset, mode) \ 119 MUX_REG_730(mux_reg, mode_offset, mode) \
121 PULL_REG_730(mux_reg, pull_bit, pull_status) \ 120 PULL_REG_730(mux_reg, pull_bit, pull_status) \
122 PU_PD_REG(pu_pd_reg, pu_pd_status) \ 121 PU_PD_REG(NA, 0) \
123}, 122},
124 123
125#define MUX_CFG_24XX(desc, reg_offset, mode, \ 124#define MUX_CFG_24XX(desc, reg_offset, mode, \
@@ -172,6 +171,11 @@ enum omap730_index {
172 E4_730_KBC2, 171 E4_730_KBC2,
173 F4_730_KBC3, 172 F4_730_KBC3,
174 E3_730_KBC4, 173 E3_730_KBC4,
174
175 /* USB */
176 AA17_730_USB_DM,
177 W16_730_USB_PU_EN,
178 W17_730_USB_VBUSI,
175}; 179};
176 180
177enum omap1xxx_index { 181enum omap1xxx_index {
@@ -403,9 +407,53 @@ enum omap24xx_index {
403 /* 24xx Menelaus interrupt */ 407 /* 24xx Menelaus interrupt */
404 W19_24XX_SYS_NIRQ, 408 W19_24XX_SYS_NIRQ,
405 409
410 /* 24xx clock */
411 W14_24XX_SYS_CLKOUT,
412
413 /* 242X McBSP */
414 Y15_24XX_MCBSP2_CLKX,
415 R14_24XX_MCBSP2_FSX,
416 W15_24XX_MCBSP2_DR,
417 V15_24XX_MCBSP2_DX,
418
406 /* 24xx GPIO */ 419 /* 24xx GPIO */
420 M21_242X_GPIO11,
421 AA10_242X_GPIO13,
422 AA6_242X_GPIO14,
423 AA4_242X_GPIO15,
424 Y11_242X_GPIO16,
425 AA12_242X_GPIO17,
426 AA8_242X_GPIO58,
407 Y20_24XX_GPIO60, 427 Y20_24XX_GPIO60,
428 W4__24XX_GPIO74,
408 M15_24XX_GPIO92, 429 M15_24XX_GPIO92,
430 V14_24XX_GPIO117,
431
432 P20_24XX_TSC_IRQ,
433
434 /* UART3 */
435 K15_24XX_UART3_TX,
436 K14_24XX_UART3_RX,
437
438 /* Keypad GPIO*/
439 T19_24XX_KBR0,
440 R19_24XX_KBR1,
441 V18_24XX_KBR2,
442 M21_24XX_KBR3,
443 E5__24XX_KBR4,
444 M18_24XX_KBR5,
445 R20_24XX_KBC0,
446 M14_24XX_KBC1,
447 H19_24XX_KBC2,
448 V17_24XX_KBC3,
449 P21_24XX_KBC4,
450 L14_24XX_KBC5,
451 N19_24XX_KBC6,
452
453 /* 24xx Menelaus Keypad GPIO */
454 B3__24XX_KBR5,
455 AA4_24XX_KBC2,
456 B13_24XX_KBC6,
409}; 457};
410 458
411#ifdef CONFIG_OMAP_MUX 459#ifdef CONFIG_OMAP_MUX