ARM: OMAP2: Change 24xx to use new register access

This patch changes 24xx to use new register access, except for clock
framework. Clock framework register access will get updates in the
next patch.

Note that board-*.c files change GPMC (General Purpose Memory Controller)
access to use gpmc_cs_write_reg() instead of accessing the registers
directly. The code also uses gpmc_fck instead of it's parent clock
core_l3_ck for GPMC clock.

The H4 board file also adds h4_init_flash() function, which specify the
flash start and end addresses.

Also note that sleep.S removes some unused registers addresses.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

1 files changed, 67 insertions, 3 deletions

diff --git a/include/asm-arm/arch-omap/io.h b/include/asm-arm/arch-omap/io.h
index 289082d07f14..160578e1f557 100644
--- a/include/asm-arm/arch-omap/io.h
+++ b/include/asm-arm/arch-omap/io.h
@@ -80,6 +80,13 @@
 #define OMAP243X_GPMC_PHYS      OMAP243X_GPMC_BASE      /* 0x49000000 */
 #define OMAP243X_GPMC_VIRT      0xFE000000
 #define OMAP243X_GPMC_SIZE      SZ_1M
+#define OMAP243X_SDRC_PHYS      OMAP243X_SDRC_BASE
+#define OMAP243X_SDRC_VIRT      0xFD000000
+#define OMAP243X_SDRC_SIZE      SZ_1M
+#define OMAP243X_SMS_PHYS       OMAP243X_SMS_BASE
+#define OMAP243X_SMS_VIRT       0xFC000000
+#define OMAP243X_SMS_SIZE       SZ_1M
+
 #endif
 
 #define IO_OFFSET       0x90000000
@@ -88,16 +95,73 @@
 #define io_v2p(va)      ((va) - IO_OFFSET)      /* Works for L3 and L4 */
 
 /* DSP */
-#define DSP_MEM_24XX_PHYS       OMAP24XX_DSP_MEM_BASE   /* 0x58000000 */
+#define DSP_MEM_24XX_PHYS       OMAP2420_DSP_MEM_BASE   /* 0x58000000 */
 #define DSP_MEM_24XX_VIRT       0xe0000000
 #define DSP_MEM_24XX_SIZE       0x28000
-#define DSP_IPI_24XX_PHYS       OMAP24XX_DSP_IPI_BASE   /* 0x59000000 */
+#define DSP_IPI_24XX_PHYS       OMAP2420_DSP_IPI_BASE   /* 0x59000000 */
 #define DSP_IPI_24XX_VIRT       0xe1000000
 #define DSP_IPI_24XX_SIZE       SZ_4K
-#define DSP_MMU_24XX_PHYS       OMAP24XX_DSP_MMU_BASE   /* 0x5a000000 */
+#define DSP_MMU_24XX_PHYS       OMAP2420_DSP_MMU_BASE   /* 0x5a000000 */
 #define DSP_MMU_24XX_VIRT       0xe2000000
 #define DSP_MMU_24XX_SIZE       SZ_4K
 
+#elif defined(CONFIG_ARCH_OMAP3)
+
+/* We map both L3 and L4 on OMAP3 */
+#define L3_34XX_PHYS            L3_34XX_BASE    /* 0x68000000 */
+#define L3_34XX_VIRT            0xf8000000
+#define L3_34XX_SIZE            SZ_1M   /* 44kB of 128MB used, want 1MB sect */
+
+#define L4_34XX_PHYS            L4_34XX_BASE    /* 0x48000000 */
+#define L4_34XX_VIRT            0xd8000000
+#define L4_34XX_SIZE            SZ_4M   /* 1MB of 128MB used, want 1MB sect */
+
+/*
+ * Need to look at the Size 4M for L4.
+ * VPOM3430 was not working for Int controller
+ */
+
+#define L4_WK_34XX_PHYS         L4_WK_34XX_BASE /* 0x48300000 */
+#define L4_WK_34XX_VIRT         0xd8300000
+#define L4_WK_34XX_SIZE         SZ_1M
+
+#define L4_PER_34XX_PHYS        L4_PER_34XX_BASE /* 0x49000000 */
+#define L4_PER_34XX_VIRT        0xd9000000
+#define L4_PER_34XX_SIZE        SZ_1M
+
+#define L4_EMU_34XX_PHYS        L4_EMU_34XX_BASE /* 0x54000000 */
+#define L4_EMU_34XX_VIRT        0xe4000000
+#define L4_EMU_34XX_SIZE        SZ_64M
+
+#define OMAP34XX_GPMC_PHYS      OMAP34XX_GPMC_BASE /* 0x6E000000 */
+#define OMAP34XX_GPMC_VIRT      0xFE000000
+#define OMAP34XX_GPMC_SIZE      SZ_1M
+
+#define OMAP343X_SMS_PHYS       OMAP343X_SMS_BASE /* 0x6C000000 */
+#define OMAP343X_SMS_VIRT       0xFC000000
+#define OMAP343X_SMS_SIZE       SZ_1M
+
+#define OMAP343X_SDRC_PHYS      OMAP343X_SDRC_BASE /* 0x6D000000 */
+#define OMAP343X_SDRC_VIRT      0xFD000000
+#define OMAP343X_SDRC_SIZE      SZ_1M
+
+
+#define IO_OFFSET               0x90000000
+#define IO_ADDRESS(pa)          ((pa) + IO_OFFSET)/* Works for L3 and L4 */
+#define io_p2v(pa)              ((pa) + IO_OFFSET)/* Works for L3 and L4 */
+#define io_v2p(va)              ((va) - IO_OFFSET)/* Works for L3 and L4 */
+
+/* DSP */
+#define DSP_MEM_34XX_PHYS       OMAP34XX_DSP_MEM_BASE   /* 0x58000000 */
+#define DSP_MEM_34XX_VIRT       0xe0000000
+#define DSP_MEM_34XX_SIZE       0x28000
+#define DSP_IPI_34XX_PHYS       OMAP34XX_DSP_IPI_BASE   /* 0x59000000 */
+#define DSP_IPI_34XX_VIRT       0xe1000000
+#define DSP_IPI_34XX_SIZE       SZ_4K
+#define DSP_MMU_34XX_PHYS       OMAP34XX_DSP_MMU_BASE   /* 0x5a000000 */
+#define DSP_MMU_34XX_VIRT       0xe2000000
+#define DSP_MMU_34XX_SIZE       SZ_4K
+
 #endif
 
 #ifndef __ASSEMBLER__