ARM: OMAP2: New DPLL clock framework

These changes is the result of the discussion with Paul Walmsley.
His ideas are included into this patch.

Remove DPLL output divider handling from DPLLs and CLKOUTX2 clocks,
and place it into specific DPLL output divider clocks (e.g., dpll3_m2_clk).
omap2_get_dpll_rate() now returns the correct DPLL rate, as represented
by the DPLL's CLKOUT output. Also add MPU and IVA2 subsystem clocks, along
with high-frequency bypass support.

Add support for DPLLs function in locked and bypass clock modes.

Signed-off-by: Roman Tereshonkov <roman.tereshonkov@nokia.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

1 files changed, 0 insertions, 2 deletions

diff --git a/include/asm-arm/arch-omap/clock.h b/include/asm-arm/arch-omap/clock.h
index 0baa79acc0b7..57523bdb642b 100644
--- a/include/asm-arm/arch-omap/clock.h
+++ b/include/asm-arm/arch-omap/clock.h
@@ -33,8 +33,6 @@ struct dpll_data {
         void __iomem            *mult_div1_reg;
         u32                     mult_mask;
         u32                     div1_mask;
-        void __iomem            *div2_reg;
-        u32                     div2_mask;
 #  if defined(CONFIG_ARCH_OMAP3)
         void __iomem            *control_reg;
         u32                     enable_mask;