[ARM] 4293/1: ns9xxx: Add bit fields FS and ND to the definition of

	SYS_PLL register

Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 6 insertions, 0 deletions

diff --git a/include/asm-arm/arch-ns9xxx/regs-sys.h b/include/asm-arm/arch-ns9xxx/regs-sys.h
index 8162a50bb273..a42546aeb92a 100644
--- a/include/asm-arm/arch-ns9xxx/regs-sys.h
+++ b/include/asm-arm/arch-ns9xxx/regs-sys.h
@@ -48,6 +48,12 @@
 /* PLL Configuration register */
 #define SYS_PLL         __REG(0xa0900188)
 
+/* PLL FS status */
+#define SYS_PLL_FS              __REGBITS(24, 23)
+
+/* PLL ND status */
+#define SYS_PLL_ND              __REGBITS(20, 16)
+
 /* PLL Configuration register: PLL SW change */
 #define SYS_PLL_SWC             __REGBIT(15)
 #define SYS_PLL_SWC_NO                  __REGVAL(SYS_PLL_SWC, 0)