diff options
author | David Woodhouse <David.Woodhouse@intel.com> | 2008-07-25 10:40:14 -0400 |
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committer | David Woodhouse <David.Woodhouse@intel.com> | 2008-07-25 10:40:14 -0400 |
commit | ff877ea80efa2015b6263766f78ee42c2a1b32f9 (patch) | |
tree | 85205005c611ab774702148558321c6fb92f1ccd /include/asm-arm/arch-mxc/mx31.h | |
parent | 30821fee4f0cb3e6d241d9f7ddc37742212e3eb7 (diff) | |
parent | d37e6bf68fc1eb34a4ad21d9ae8890ed37ea80e7 (diff) |
Merge branch 'linux-next' of git://git.infradead.org/~dedekind/ubi-2.6
Diffstat (limited to 'include/asm-arm/arch-mxc/mx31.h')
-rw-r--r-- | include/asm-arm/arch-mxc/mx31.h | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/include/asm-arm/arch-mxc/mx31.h b/include/asm-arm/arch-mxc/mx31.h index 36a1af495bb3..a7373e4a56cb 100644 --- a/include/asm-arm/arch-mxc/mx31.h +++ b/include/asm-arm/arch-mxc/mx31.h | |||
@@ -320,6 +320,8 @@ | |||
320 | #define MXC_MAX_GPIO_LINES (GPIO_NUM_PIN * GPIO_PORT_NUM) | 320 | #define MXC_MAX_GPIO_LINES (GPIO_NUM_PIN * GPIO_PORT_NUM) |
321 | #define MXC_MAX_VIRTUAL_INTS 16 | 321 | #define MXC_MAX_VIRTUAL_INTS 16 |
322 | 322 | ||
323 | #define NR_IRQS (MXC_MAX_INT_LINES + MXC_MAX_GPIO_LINES + MXC_MAX_VIRTUAL_INTS) | ||
324 | |||
323 | /*! | 325 | /*! |
324 | * Number of GPIO port as defined in the IC Spec | 326 | * Number of GPIO port as defined in the IC Spec |
325 | */ | 327 | */ |
@@ -347,6 +349,25 @@ | |||
347 | #define SYSTEM_REV_MIN CHIP_REV_1_0 | 349 | #define SYSTEM_REV_MIN CHIP_REV_1_0 |
348 | #define SYSTEM_REV_NUM 3 | 350 | #define SYSTEM_REV_NUM 3 |
349 | 351 | ||
352 | /* gpio and gpio based interrupt handling */ | ||
353 | #define GPIO_DR 0x00 | ||
354 | #define GPIO_GDIR 0x04 | ||
355 | #define GPIO_PSR 0x08 | ||
356 | #define GPIO_ICR1 0x0C | ||
357 | #define GPIO_ICR2 0x10 | ||
358 | #define GPIO_IMR 0x14 | ||
359 | #define GPIO_ISR 0x18 | ||
360 | #define GPIO_INT_LOW_LEV 0x0 | ||
361 | #define GPIO_INT_HIGH_LEV 0x1 | ||
362 | #define GPIO_INT_RISE_EDGE 0x2 | ||
363 | #define GPIO_INT_FALL_EDGE 0x3 | ||
364 | #define GPIO_INT_NONE 0x4 | ||
365 | |||
366 | /* Mandatory defines used globally */ | ||
367 | |||
368 | /* this CPU supports up to 96 GPIOs */ | ||
369 | #define ARCH_NR_GPIOS 96 | ||
370 | |||
350 | #if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) | 371 | #if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) |
351 | 372 | ||
352 | /* this is a i.MX31 CPU */ | 373 | /* this is a i.MX31 CPU */ |