diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-arm/arch-lh7a40x/entry-macro.S |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'include/asm-arm/arch-lh7a40x/entry-macro.S')
-rw-r--r-- | include/asm-arm/arch-lh7a40x/entry-macro.S | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/include/asm-arm/arch-lh7a40x/entry-macro.S b/include/asm-arm/arch-lh7a40x/entry-macro.S new file mode 100644 index 000000000000..865f396aa63c --- /dev/null +++ b/include/asm-arm/arch-lh7a40x/entry-macro.S | |||
@@ -0,0 +1,67 @@ | |||
1 | /* | ||
2 | * include/asm-arm/arch-lh7a40x/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for LH7A40x platforms | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | # if defined (CONFIG_ARCH_LH7A400) && defined (CONFIG_ARCH_LH7A404) | ||
12 | # error "LH7A400 and LH7A404 are mutually exclusive" | ||
13 | # endif | ||
14 | |||
15 | # if defined (CONFIG_ARCH_LH7A400) | ||
16 | .macro disable_fiq | ||
17 | .endm | ||
18 | |||
19 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
20 | mov \irqnr, #0 | ||
21 | mov \base, #io_p2v(0x80000000) @ APB registers | ||
22 | ldr \irqstat, [\base, #0x500] @ PIC INTSR | ||
23 | |||
24 | 1001: movs \irqstat, \irqstat, lsr #1 @ Shift into carry | ||
25 | bcs 1008f @ Bit set; irq found | ||
26 | add \irqnr, \irqnr, #1 | ||
27 | bne 1001b @ Until no bits | ||
28 | b 1009f @ Nothing? Hmm. | ||
29 | 1008: movs \irqstat, #1 @ Force !Z | ||
30 | 1009: | ||
31 | .endm | ||
32 | |||
33 | #elif defined(CONFIG_ARCH_LH7A404) | ||
34 | |||
35 | .macro disable_fiq | ||
36 | .endm | ||
37 | |||
38 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
39 | mov \irqnr, #0 @ VIC1 irq base | ||
40 | mov \base, #io_p2v(0x80000000) @ APB registers | ||
41 | add \base, \base, #0x8000 | ||
42 | ldr \tmp, [\base, #0x0030] @ VIC1_VECTADDR | ||
43 | tst \tmp, #VA_VECTORED @ Direct vectored | ||
44 | bne 1002f | ||
45 | tst \tmp, #VA_VIC1DEFAULT @ Default vectored VIC1 | ||
46 | ldrne \irqstat, [\base, #0] @ VIC1_IRQSTATUS | ||
47 | bne 1001f | ||
48 | add \base, \base, #(0xa000 - 0x8000) | ||
49 | ldr \tmp, [\base, #0x0030] @ VIC2_VECTADDR | ||
50 | tst \tmp, #VA_VECTORED @ Direct vectored | ||
51 | bne 1002f | ||
52 | ldr \irqstat, [\base, #0] @ VIC2_IRQSTATUS | ||
53 | mov \irqnr, #32 @ VIC2 irq base | ||
54 | |||
55 | 1001: movs \irqstat, \irqstat, lsr #1 @ Shift into carry | ||
56 | bcs 1008f @ Bit set; irq found | ||
57 | add \irqnr, \irqnr, #1 | ||
58 | bne 1001b @ Until no bits | ||
59 | b 1009f @ Nothing? Hmm. | ||
60 | 1002: and \irqnr, \tmp, #0x3f @ Mask for valid bits | ||
61 | 1008: movs \irqstat, #1 @ Force !Z | ||
62 | str \tmp, [\base, #0x0030] @ Clear vector | ||
63 | 1009: | ||
64 | .endm | ||
65 | #endif | ||
66 | |||
67 | |||