[ARM] 3400/1: lpd7a40x: platform headers update

Patch from Marc Singer

Updates to the lpd7a40x platform headers.  Includes support for new
architecture, lpd7a400.

Signed-off-by: Marc Singer <elf@buici.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 6 insertions, 2 deletions

diff --git a/include/asm-arm/arch-lh7a40x/constants.h b/include/asm-arm/arch-lh7a40x/constants.h
index 52c1cb9c39c6..2929e891ee03 100644
--- a/include/asm-arm/arch-lh7a40x/constants.h
+++ b/include/asm-arm/arch-lh7a40x/constants.h
@@ -29,8 +29,7 @@
 
 #if defined (CONFIG_MACH_LPD7A400) || defined (CONFIG_MACH_LPD7A404)
 
-# define IOBARRIER_PHYS         0xc0000000 /* Start of SDRAM */
-/*# define IOBARRIER_PHYS               0x00000000 */ /* Start of flash */
+# define IOBARRIER_PHYS         0x10000000 /* Second bank, fastest timing */
 # define IOBARRIER_VIRT         0xf0000000
 # define IOBARRIER_SIZE         PAGE_SIZE
 
@@ -53,6 +52,9 @@
 # define CPLD08_PHYS            CPLDX_PHYS (0x08)
 # define CPLD08_VIRT            CPLDX_VIRT (0x08)
 # define CPLD08_SIZE            PAGE_SIZE
+# define CPLD0A_PHYS            CPLDX_PHYS (0x0a)
+# define CPLD0A_VIRT            CPLDX_VIRT (0x0a)
+# define CPLD0A_SIZE            PAGE_SIZE
 # define CPLD0C_PHYS            CPLDX_PHYS (0x0c)
 # define CPLD0C_VIRT            CPLDX_VIRT (0x0c)
 # define CPLD0C_SIZE            PAGE_SIZE
@@ -84,5 +86,7 @@
 #define XTAL_IN                 14745600        /* 14.7456 MHz crystal */
 #define PLL_CLOCK               (XTAL_IN * 21)  /* 309 MHz PLL clock */
 #define MAX_HCLK_KHZ            100000          /* HCLK max limit ~100MHz */
+#define HCLK                    (99993600)
+//#define HCLK                  (119808000)
 
 #endif /* __ASM_ARCH_CONSTANTS_H */