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authorJeff Garzik <jeff@garzik.org>2006-06-08 15:24:46 -0400
committerJeff Garzik <jeff@garzik.org>2006-06-08 15:24:46 -0400
commitd15a88fc21ef225768ce31be16edfc9c6e2e02e3 (patch)
treed4cb0a1bc97973bb947e2667ae56bc4bc2256e9d /include/asm-arm/arch-l7200/serial_l7200.h
parentb53471711f21ba0e151075f0e1d6d531eb50f1b1 (diff)
parent1def630a6a49dda5bc89dfbd86656293640456f0 (diff)
Merge branch 'master' into upstream
Diffstat (limited to 'include/asm-arm/arch-l7200/serial_l7200.h')
-rw-r--r--include/asm-arm/arch-l7200/serial_l7200.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-arm/arch-l7200/serial_l7200.h b/include/asm-arm/arch-l7200/serial_l7200.h
index 238c595d97ea..b1008a9d23e5 100644
--- a/include/asm-arm/arch-l7200/serial_l7200.h
+++ b/include/asm-arm/arch-l7200/serial_l7200.h
@@ -28,7 +28,7 @@
28#define UARTDR 0x00 /* Tx/Rx data */ 28#define UARTDR 0x00 /* Tx/Rx data */
29#define RXSTAT 0x04 /* Rx status */ 29#define RXSTAT 0x04 /* Rx status */
30#define H_UBRLCR 0x08 /* mode register high */ 30#define H_UBRLCR 0x08 /* mode register high */
31#define M_UBRLCR 0x0C /* mode reg mid (MSB of buad)*/ 31#define M_UBRLCR 0x0C /* mode reg mid (MSB of baud)*/
32#define L_UBRLCR 0x10 /* mode reg low (LSB of baud)*/ 32#define L_UBRLCR 0x10 /* mode reg low (LSB of baud)*/
33#define UARTCON 0x14 /* control register */ 33#define UARTCON 0x14 /* control register */
34#define UARTFLG 0x18 /* flag register */ 34#define UARTFLG 0x18 /* flag register */