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authorAndrew Victor <andrew@sanpeople.com>2007-05-11 16:01:28 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-05-11 17:02:48 -0400
commitc53c9cf60e49119e97d38390849cac5b2f0a0981 (patch)
tree37615dedbbd8980b8357df47d90843eb86d017ff /include/asm-arm/arch-ks8695/regs-sys.h
parentc42dcb3dcfd3a473ab7c79c2ae91fc1c2e4dc5db (diff)
[ARM] 4331/3: Support for Micrel/Kendin KS8695 processor
Add core support for the Kendin/Micrel KS8695 processor family. It is an ARM922-T based SoC with integrated USART, 4-port Ethernet Switch, WAN Ethernet port, and optional PCI Host bridge, etc. http://www.micrel.com/page.do?page=product-info/sys_on_chip.jsp This patch is based on earlier patches from Lennert Buytenhek, Ben Dooks and Greg Ungerer posted to the arm-linux-kernel mailing list in March 2006; and Micrel's 2.6.9 port. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-ks8695/regs-sys.h')
-rw-r--r--include/asm-arm/arch-ks8695/regs-sys.h34
1 files changed, 34 insertions, 0 deletions
diff --git a/include/asm-arm/arch-ks8695/regs-sys.h b/include/asm-arm/arch-ks8695/regs-sys.h
new file mode 100644
index 000000000000..f3179815b8ee
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/regs-sys.h
@@ -0,0 +1,34 @@
1/*
2 * include/asm-arm/arch-ks8695/regs-sys.h
3 *
4 * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
5 * Copyright (C) 2006 Simtec Electronics
6 *
7 * KS8695 - System control registers and bit definitions
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef KS8695_SYS_H
15#define KS8695_SYS_H
16
17#define KS8695_SYS_OFFSET (0xF0000 + 0x0000)
18#define KS8695_SYS_VA (KS8695_IO_VA + KS8695_SYS_OFFSET)
19#define KS8695_SYS_PA (KS8695_IO_PA + KS8695_SYS_OFFSET)
20
21
22#define KS8695_SYSCFG (0x00) /* System Configuration Register */
23#define KS8695_CLKCON (0x04) /* System Clock and Bus Control Register */
24
25
26/* System Configuration Register */
27#define SYSCFG_SPRBP (0x3ff << 16) /* Register Bank Base Pointer */
28
29/* System Clock and Bus Control Register */
30#define CLKCON_SFMODE (1 << 8) /* System Fast Mode for Simulation */
31#define CLKCON_SCDC (7 << 0) /* System Clock Divider Select */
32
33
34#endif