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authorAndrew Victor <andrew@sanpeople.com>2007-05-11 16:01:28 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-05-11 17:02:48 -0400
commitc53c9cf60e49119e97d38390849cac5b2f0a0981 (patch)
tree37615dedbbd8980b8357df47d90843eb86d017ff /include/asm-arm/arch-ks8695/entry-macro.S
parentc42dcb3dcfd3a473ab7c79c2ae91fc1c2e4dc5db (diff)
[ARM] 4331/3: Support for Micrel/Kendin KS8695 processor
Add core support for the Kendin/Micrel KS8695 processor family. It is an ARM922-T based SoC with integrated USART, 4-port Ethernet Switch, WAN Ethernet port, and optional PCI Host bridge, etc. http://www.micrel.com/page.do?page=product-info/sys_on_chip.jsp This patch is based on earlier patches from Lennert Buytenhek, Ben Dooks and Greg Ungerer posted to the arm-linux-kernel mailing list in March 2006; and Micrel's 2.6.9 port. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-ks8695/entry-macro.S')
-rw-r--r--include/asm-arm/arch-ks8695/entry-macro.S53
1 files changed, 53 insertions, 0 deletions
diff --git a/include/asm-arm/arch-ks8695/entry-macro.S b/include/asm-arm/arch-ks8695/entry-macro.S
new file mode 100644
index 000000000000..e34bdf85920e
--- /dev/null
+++ b/include/asm-arm/arch-ks8695/entry-macro.S
@@ -0,0 +1,53 @@
1/*
2 * include/asm-arm/arch-ks8695/entry-macro.S
3 *
4 * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
5 * Copyright (C) 2006 Simtec Electronics
6 *
7 * Low-level IRQ helper macros for KS8695
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12*/
13
14#include <asm/hardware.h>
15#include <asm/arch/regs-irq.h>
16
17 .macro disable_fiq
18 .endm
19
20 .macro get_irqnr_preamble, base, tmp
21 ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller
22 .endm
23
24 .macro arch_ret_to_user, tmp1, tmp2
25 .endm
26
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28 ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register
29
30 teq \irqstat, #0
31 beq 1001f
32
33 mov \irqnr, #0
34
35 tst \irqstat, #0xff
36 moveq \irqstat, \irqstat, lsr #8
37 addeq \irqnr, \irqnr, #8
38 tsteq \irqstat, #0xff
39 moveq \irqstat, \irqstat, lsr #8
40 addeq \irqnr, \irqnr, #8
41 tsteq \irqstat, #0xff
42 moveq \irqstat, \irqstat, lsr #8
43 addeq \irqnr, \irqnr, #8
44 tst \irqstat, #0x0f
45 moveq \irqstat, \irqstat, lsr #4
46 addeq \irqnr, \irqnr, #4
47 tst \irqstat, #0x03
48 moveq \irqstat, \irqstat, lsr #2
49 addeq \irqnr, \irqnr, #2
50 tst \irqstat, #0x01
51 addeqs \irqnr, \irqnr, #1
521001:
53 .endm