diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-06 16:20:10 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-06 16:20:10 -0400 |
commit | c6799ade4ae04b53a5f677e5289116155ff01574 (patch) | |
tree | 3601b5e2387e39d62c207e4268c6cc5c68f2a364 /include/asm-arm/arch-ixp4xx | |
parent | b7405e16435f710edfae6ba32bef4ca20d3de145 (diff) | |
parent | 5cd47155155a32e5b944ac9fc3f3dc578e429aa0 (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (82 commits)
[ARM] Add comments marking in-use ptrace numbers
[ARM] Move syscall saving out of the way of utrace
[ARM] 4360/1: S3C24XX: regs-udc.h remove unused macro
[ARM] 4358/1: S3C24XX: mach-qt2410.c: remove linux/mmc/protocol.h header
[ARM] mm 10: allow memory type to be specified with ioremap
[ARM] mm 9: add additional device memory types
[ARM] mm 8: define mem_types table L1 bit 4 to be for ARMv6
[ARM] iop: add missing parens in macro
[ARM] mm 7: remove duplicated __ioremap() prototypes
ARM: OMAP: fix OMAP1 mpuio suspend/resume oops
ARM: OMAP: MPUIO wake updates
ARM: OMAP: speed up gpio irq handling
ARM: OMAP: plat-omap changes for 2430 SDP
ARM: OMAP: gpio object shrinkage, cleanup
ARM: OMAP: /sys/kernel/debug/omap_gpio
ARM: OMAP: Implement workaround for GPIO wakeup bug in OMAP2420 silicon
ARM: OMAP: Enable 24xx GPIO autoidling
[ARM] 4318/2: DSM-G600 Board Support
[ARM] 4227/1: minor head.S fixups
[ARM] 4328/1: Move i.MX UART regs to driver
...
Diffstat (limited to 'include/asm-arm/arch-ixp4xx')
-rw-r--r-- | include/asm-arm/arch-ixp4xx/cpu.h | 31 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp4xx/dsmg600.h | 57 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp4xx/entry-macro.S | 4 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp4xx/gpio.h | 73 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp4xx/hardware.h | 12 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp4xx/io.h | 6 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp4xx/irqs.h | 16 | ||||
-rw-r--r-- | include/asm-arm/arch-ixp4xx/ixp4xx-regs.h | 15 |
8 files changed, 184 insertions, 30 deletions
diff --git a/include/asm-arm/arch-ixp4xx/cpu.h b/include/asm-arm/arch-ixp4xx/cpu.h new file mode 100644 index 000000000000..d2523b326c6c --- /dev/null +++ b/include/asm-arm/arch-ixp4xx/cpu.h | |||
@@ -0,0 +1,31 @@ | |||
1 | /* | ||
2 | * include/asm-arm/arch-ixp4xx/cpu.h | ||
3 | * | ||
4 | * IXP4XX cpu type detection | ||
5 | * | ||
6 | * Copyright (C) 2007 MontaVista Software, Inc. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #ifndef __ASM_ARCH_CPU_H__ | ||
15 | #define __ASM_ARCH_CPU_H__ | ||
16 | |||
17 | extern unsigned int processor_id; | ||
18 | /* Processor id value in CP15 Register 0 */ | ||
19 | #define IXP425_PROCESSOR_ID_VALUE 0x690541c0 | ||
20 | #define IXP435_PROCESSOR_ID_VALUE 0x69054040 | ||
21 | #define IXP465_PROCESSOR_ID_VALUE 0x69054200 | ||
22 | #define IXP4XX_PROCESSOR_ID_MASK 0xfffffff0 | ||
23 | |||
24 | #define cpu_is_ixp42x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \ | ||
25 | IXP425_PROCESSOR_ID_VALUE) | ||
26 | #define cpu_is_ixp43x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \ | ||
27 | IXP435_PROCESSOR_ID_VALUE) | ||
28 | #define cpu_is_ixp46x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \ | ||
29 | IXP465_PROCESSOR_ID_VALUE) | ||
30 | |||
31 | #endif /* _ASM_ARCH_CPU_H */ | ||
diff --git a/include/asm-arm/arch-ixp4xx/dsmg600.h b/include/asm-arm/arch-ixp4xx/dsmg600.h new file mode 100644 index 000000000000..a19605ad240d --- /dev/null +++ b/include/asm-arm/arch-ixp4xx/dsmg600.h | |||
@@ -0,0 +1,57 @@ | |||
1 | /* | ||
2 | * DSM-G600 platform specific definitions | ||
3 | * | ||
4 | * Copyright (C) 2006 Tower Technologies | ||
5 | * Author: Alessandro Zummo <a.zummo@towertech.it> | ||
6 | * | ||
7 | * based on ixdp425.h: | ||
8 | * Copyright 2004 (C) MontaVista, Software, Inc. | ||
9 | * | ||
10 | * This file is licensed under the terms of the GNU General Public | ||
11 | * License version 2. This program is licensed "as is" without any | ||
12 | * warranty of any kind, whether express or implied. | ||
13 | */ | ||
14 | |||
15 | #ifndef __ASM_ARCH_HARDWARE_H__ | ||
16 | #error "Do not include this directly, instead #include <asm/hardware.h>" | ||
17 | #endif | ||
18 | |||
19 | #define DSMG600_SDA_PIN 5 | ||
20 | #define DSMG600_SCL_PIN 4 | ||
21 | |||
22 | /* | ||
23 | * DSMG600 PCI IRQs | ||
24 | */ | ||
25 | #define DSMG600_PCI_MAX_DEV 4 | ||
26 | #define DSMG600_PCI_IRQ_LINES 3 | ||
27 | |||
28 | |||
29 | /* PCI controller GPIO to IRQ pin mappings */ | ||
30 | #define DSMG600_PCI_INTA_PIN 11 | ||
31 | #define DSMG600_PCI_INTB_PIN 10 | ||
32 | #define DSMG600_PCI_INTC_PIN 9 | ||
33 | #define DSMG600_PCI_INTD_PIN 8 | ||
34 | #define DSMG600_PCI_INTE_PIN 7 | ||
35 | #define DSMG600_PCI_INTF_PIN 6 | ||
36 | |||
37 | /* DSM-G600 Timer Setting */ | ||
38 | #define DSMG600_FREQ 66000000 | ||
39 | |||
40 | /* Buttons */ | ||
41 | |||
42 | #define DSMG600_PB_GPIO 15 /* power button */ | ||
43 | #define DSMG600_PB_BM (1L << DSMG600_PB_GPIO) | ||
44 | |||
45 | #define DSMG600_RB_GPIO 3 /* reset button */ | ||
46 | |||
47 | #define DSMG600_RB_IRQ IRQ_IXP4XX_GPIO3 | ||
48 | |||
49 | #define DSMG600_PO_GPIO 2 /* power off */ | ||
50 | |||
51 | /* LEDs */ | ||
52 | |||
53 | #define DSMG600_LED_PWR_GPIO 0 | ||
54 | #define DSMG600_LED_PWR_BM (1L << DSMG600_LED_PWR_GPIO) | ||
55 | |||
56 | #define DSMG600_LED_WLAN_GPIO 14 | ||
57 | #define DSMG600_LED_WLAN_BM (1L << DSMG600_LED_WLAN_GPIO) | ||
diff --git a/include/asm-arm/arch-ixp4xx/entry-macro.S b/include/asm-arm/arch-ixp4xx/entry-macro.S index dadb568b7ef0..f144a005ed95 100644 --- a/include/asm-arm/arch-ixp4xx/entry-macro.S +++ b/include/asm-arm/arch-ixp4xx/entry-macro.S | |||
@@ -31,9 +31,9 @@ | |||
31 | 31 | ||
32 | 1001: | 32 | 1001: |
33 | /* | 33 | /* |
34 | * IXP465 has an upper IRQ status register | 34 | * IXP465/IXP435 has an upper IRQ status register |
35 | */ | 35 | */ |
36 | #if defined(CONFIG_CPU_IXP46X) | 36 | #if defined(CONFIG_CPU_IXP46X) || defined(CONFIG_CPU_IXP43X) |
37 | ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP2_OFFSET) | 37 | ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP2_OFFSET) |
38 | ldr \irqstat, [\irqstat] @ get upper interrupts | 38 | ldr \irqstat, [\irqstat] @ get upper interrupts |
39 | mov \irqnr, #63 | 39 | mov \irqnr, #63 |
diff --git a/include/asm-arm/arch-ixp4xx/gpio.h b/include/asm-arm/arch-ixp4xx/gpio.h new file mode 100644 index 000000000000..3a4c5b8ae9e1 --- /dev/null +++ b/include/asm-arm/arch-ixp4xx/gpio.h | |||
@@ -0,0 +1,73 @@ | |||
1 | /* | ||
2 | * linux/include/asm-arm/arch-ixp4xx/gpio.h | ||
3 | * | ||
4 | * IXP4XX GPIO wrappers for arch-neutral GPIO calls | ||
5 | * | ||
6 | * Written by Milan Svoboda <msvoboda@ra.rockwell.com> | ||
7 | * Based on PXA implementation by Philipp Zabel <philipp.zabel@gmail.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
22 | * | ||
23 | */ | ||
24 | |||
25 | #ifndef __ASM_ARCH_IXP4XX_GPIO_H | ||
26 | #define __ASM_ARCH_IXP4XX_GPIO_H | ||
27 | |||
28 | #include <asm/hardware.h> | ||
29 | |||
30 | static inline int gpio_request(unsigned gpio, const char *label) | ||
31 | { | ||
32 | return 0; | ||
33 | } | ||
34 | |||
35 | static inline void gpio_free(unsigned gpio) | ||
36 | { | ||
37 | return; | ||
38 | } | ||
39 | |||
40 | static inline int gpio_direction_input(unsigned gpio) | ||
41 | { | ||
42 | gpio_line_config(gpio, IXP4XX_GPIO_IN); | ||
43 | return 0; | ||
44 | } | ||
45 | |||
46 | static inline int gpio_direction_output(unsigned gpio, int level) | ||
47 | { | ||
48 | gpio_line_set(gpio, level); | ||
49 | gpio_line_config(gpio, IXP4XX_GPIO_OUT); | ||
50 | return 0; | ||
51 | } | ||
52 | |||
53 | static inline int gpio_get_value(unsigned gpio) | ||
54 | { | ||
55 | int value; | ||
56 | |||
57 | gpio_line_get(gpio, &value); | ||
58 | |||
59 | return value; | ||
60 | } | ||
61 | |||
62 | static inline void gpio_set_value(unsigned gpio, int value) | ||
63 | { | ||
64 | gpio_line_set(gpio, value); | ||
65 | } | ||
66 | |||
67 | #include <asm-generic/gpio.h> /* cansleep wrappers */ | ||
68 | |||
69 | extern int gpio_to_irq(int gpio); | ||
70 | extern int irq_to_gpio(int gpio); | ||
71 | |||
72 | #endif | ||
73 | |||
diff --git a/include/asm-arm/arch-ixp4xx/hardware.h b/include/asm-arm/arch-ixp4xx/hardware.h index 88fd0877dcc1..297ceda08b61 100644 --- a/include/asm-arm/arch-ixp4xx/hardware.h +++ b/include/asm-arm/arch-ixp4xx/hardware.h | |||
@@ -17,8 +17,8 @@ | |||
17 | #ifndef __ASM_ARCH_HARDWARE_H__ | 17 | #ifndef __ASM_ARCH_HARDWARE_H__ |
18 | #define __ASM_ARCH_HARDWARE_H__ | 18 | #define __ASM_ARCH_HARDWARE_H__ |
19 | 19 | ||
20 | #define PCIBIOS_MIN_IO 0x00001000 | 20 | #define PCIBIOS_MIN_IO 0x00001000 |
21 | #define PCIBIOS_MIN_MEM 0x48000000 | 21 | #define PCIBIOS_MIN_MEM (cpu_is_ixp43x() ? 0x40000000 : 0x48000000) |
22 | 22 | ||
23 | /* | 23 | /* |
24 | * We override the standard dma-mask routines for bouncing. | 24 | * We override the standard dma-mask routines for bouncing. |
@@ -27,11 +27,8 @@ | |||
27 | 27 | ||
28 | #define pcibios_assign_all_busses() 1 | 28 | #define pcibios_assign_all_busses() 1 |
29 | 29 | ||
30 | #if defined(CONFIG_CPU_IXP46X) && !defined(__ASSEMBLY__) | 30 | #ifndef __ASSEMBLER__ |
31 | extern unsigned int processor_id; | 31 | #include <asm/arch/cpu.h> |
32 | #define cpu_is_ixp465() ((processor_id & 0xffffffc0) == 0x69054200) | ||
33 | #else | ||
34 | #define cpu_is_ixp465() (0) | ||
35 | #endif | 32 | #endif |
36 | 33 | ||
37 | /* Register locations and bits */ | 34 | /* Register locations and bits */ |
@@ -47,5 +44,6 @@ extern unsigned int processor_id; | |||
47 | #include "prpmc1100.h" | 44 | #include "prpmc1100.h" |
48 | #include "nslu2.h" | 45 | #include "nslu2.h" |
49 | #include "nas100d.h" | 46 | #include "nas100d.h" |
47 | #include "dsmg600.h" | ||
50 | 48 | ||
51 | #endif /* _ASM_ARCH_HARDWARE_H */ | 49 | #endif /* _ASM_ARCH_HARDWARE_H */ |
diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h index a41ba229c564..c72f9d79417c 100644 --- a/include/asm-arm/arch-ixp4xx/io.h +++ b/include/asm-arm/arch-ixp4xx/io.h | |||
@@ -59,10 +59,10 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data); | |||
59 | * fallback to the default. | 59 | * fallback to the default. |
60 | */ | 60 | */ |
61 | static inline void __iomem * | 61 | static inline void __iomem * |
62 | __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags) | 62 | __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned int mtype) |
63 | { | 63 | { |
64 | if((addr < 0x48000000) || (addr > 0x4fffffff)) | 64 | if((addr < PCIBIOS_MIN_MEM) || (addr > 0x4fffffff)) |
65 | return __ioremap(addr, size, flags); | 65 | return __arm_ioremap(addr, size, mtype); |
66 | 66 | ||
67 | return (void *)addr; | 67 | return (void *)addr; |
68 | } | 68 | } |
diff --git a/include/asm-arm/arch-ixp4xx/irqs.h b/include/asm-arm/arch-ixp4xx/irqs.h index e44a563d00ff..11801605047b 100644 --- a/include/asm-arm/arch-ixp4xx/irqs.h +++ b/include/asm-arm/arch-ixp4xx/irqs.h | |||
@@ -62,10 +62,10 @@ | |||
62 | /* | 62 | /* |
63 | * Only first 32 sources are valid if running on IXP42x systems | 63 | * Only first 32 sources are valid if running on IXP42x systems |
64 | */ | 64 | */ |
65 | #ifndef CONFIG_CPU_IXP46X | 65 | #if defined(CONFIG_CPU_IXP46X) || defined(CONFIG_CPU_IXP43X) |
66 | #define NR_IRQS 32 | ||
67 | #else | ||
68 | #define NR_IRQS 64 | 66 | #define NR_IRQS 64 |
67 | #else | ||
68 | #define NR_IRQS 32 | ||
69 | #endif | 69 | #endif |
70 | 70 | ||
71 | #define XSCALE_PMU_IRQ (IRQ_IXP4XX_XSCALE_PMU) | 71 | #define XSCALE_PMU_IRQ (IRQ_IXP4XX_XSCALE_PMU) |
@@ -118,4 +118,14 @@ | |||
118 | #define IRQ_NAS100D_PCI_INTD IRQ_IXP4XX_GPIO8 | 118 | #define IRQ_NAS100D_PCI_INTD IRQ_IXP4XX_GPIO8 |
119 | #define IRQ_NAS100D_PCI_INTE IRQ_IXP4XX_GPIO7 | 119 | #define IRQ_NAS100D_PCI_INTE IRQ_IXP4XX_GPIO7 |
120 | 120 | ||
121 | /* | ||
122 | * D-Link DSM-G600 RevA board IRQs | ||
123 | */ | ||
124 | #define IRQ_DSMG600_PCI_INTA IRQ_IXP4XX_GPIO11 | ||
125 | #define IRQ_DSMG600_PCI_INTB IRQ_IXP4XX_GPIO10 | ||
126 | #define IRQ_DSMG600_PCI_INTC IRQ_IXP4XX_GPIO9 | ||
127 | #define IRQ_DSMG600_PCI_INTD IRQ_IXP4XX_GPIO8 | ||
128 | #define IRQ_DSMG600_PCI_INTE IRQ_IXP4XX_GPIO7 | ||
129 | #define IRQ_DSMG600_PCI_INTF IRQ_IXP4XX_GPIO6 | ||
130 | |||
121 | #endif | 131 | #endif |
diff --git a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h index ed35e5c94f40..5d949d763a91 100644 --- a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h +++ b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h | |||
@@ -607,19 +607,4 @@ | |||
607 | 607 | ||
608 | #define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */ | 608 | #define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */ |
609 | 609 | ||
610 | #ifndef __ASSEMBLY__ | ||
611 | static inline int cpu_is_ixp46x(void) | ||
612 | { | ||
613 | #ifdef CONFIG_CPU_IXP46X | ||
614 | unsigned int processor_id; | ||
615 | |||
616 | asm("mrc p15, 0, %0, cr0, cr0, 0;" : "=r"(processor_id) :); | ||
617 | |||
618 | if ((processor_id & 0xffffff00) == 0x69054200) | ||
619 | return 1; | ||
620 | #endif | ||
621 | return 0; | ||
622 | } | ||
623 | #endif | ||
624 | |||
625 | #endif | 610 | #endif |