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authorMichael-Luke Jones <mlj28@cam.ac.uk>2007-05-23 17:41:53 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-05-26 05:09:39 -0400
commitcc50a0df51e4f2a7982ade338b3d74825ca67e08 (patch)
tree2c45b932542678b7f51911edd1bbff006527c22b /include/asm-arm/arch-ixp4xx/nslu2.h
parent435c5da00b9610f9664c5d6f38dfdafce419ef4a (diff)
[ARM] 4406/1: Trivial NSLU2 / NAS-100D header & setup code cleanup
This trivial patch updates the nslu2 and nas-100d headers to remove pointless GPIO defines, and updates nslu2-setup.c accordingly. In addition minor style cleanups to some comments are included. Signed-off-by: Michael-Luke Jones <mlj28@cam.ac.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-ixp4xx/nslu2.h')
-rw-r--r--include/asm-arm/arch-ixp4xx/nslu2.h46
1 files changed, 12 insertions, 34 deletions
diff --git a/include/asm-arm/arch-ixp4xx/nslu2.h b/include/asm-arm/arch-ixp4xx/nslu2.h
index 6b437f7c9955..850fdc5b45da 100644
--- a/include/asm-arm/arch-ixp4xx/nslu2.h
+++ b/include/asm-arm/arch-ixp4xx/nslu2.h
@@ -9,7 +9,7 @@
9 * based on ixdp425.h: 9 * based on ixdp425.h:
10 * Copyright 2004 (c) MontaVista, Software, Inc. 10 * Copyright 2004 (c) MontaVista, Software, Inc.
11 * 11 *
12 * This file is licensed under the terms of the GNU General Public 12 * This file is licensed under the terms of the GNU General Public
13 * License version 2. This program is licensed "as is" without any 13 * License version 2. This program is licensed "as is" without any
14 * warranty of any kind, whether express or implied. 14 * warranty of any kind, whether express or implied.
15 */ 15 */
@@ -34,36 +34,14 @@
34#define NSLU2_PCI_INTC_PIN 9 34#define NSLU2_PCI_INTC_PIN 9
35#define NSLU2_PCI_INTD_PIN 8 35#define NSLU2_PCI_INTD_PIN 8
36 36
37
38/* NSLU2 Timer */ 37/* NSLU2 Timer */
39#define NSLU2_FREQ 66000000 38#define NSLU2_FREQ 66000000
40#define NSLU2_CLOCK_TICK_RATE (((NSLU2_FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ)
41#define NSLU2_CLOCK_TICKS_PER_USEC ((NSLU2_CLOCK_TICK_RATE + USEC_PER_SEC/2) / USEC_PER_SEC)
42
43/* GPIO */
44
45#define NSLU2_GPIO0 0
46#define NSLU2_GPIO1 1
47#define NSLU2_GPIO2 2
48#define NSLU2_GPIO3 3
49#define NSLU2_GPIO4 4
50#define NSLU2_GPIO5 5
51#define NSLU2_GPIO6 6
52#define NSLU2_GPIO7 7
53#define NSLU2_GPIO8 8
54#define NSLU2_GPIO9 9
55#define NSLU2_GPIO10 10
56#define NSLU2_GPIO11 11
57#define NSLU2_GPIO12 12
58#define NSLU2_GPIO13 13
59#define NSLU2_GPIO14 14
60#define NSLU2_GPIO15 15
61 39
62/* Buttons */ 40/* Buttons */
63 41
64#define NSLU2_PB_GPIO NSLU2_GPIO5 42#define NSLU2_PB_GPIO 5
65#define NSLU2_PO_GPIO NSLU2_GPIO8 /* power off */ 43#define NSLU2_PO_GPIO 8 /* power off */
66#define NSLU2_RB_GPIO NSLU2_GPIO12 44#define NSLU2_RB_GPIO 12
67 45
68#define NSLU2_PB_IRQ IRQ_IXP4XX_GPIO5 46#define NSLU2_PB_IRQ IRQ_IXP4XX_GPIO5
69#define NSLU2_RB_IRQ IRQ_IXP4XX_GPIO12 47#define NSLU2_RB_IRQ IRQ_IXP4XX_GPIO12
@@ -79,16 +57,16 @@
79 57
80/* LEDs */ 58/* LEDs */
81 59
82#define NSLU2_LED_RED NSLU2_GPIO0 60#define NSLU2_LED_RED_GPIO 0
83#define NSLU2_LED_GRN NSLU2_GPIO1 61#define NSLU2_LED_GRN_GPIO 1
84 62
85#define NSLU2_LED_RED_BM (1L << NSLU2_LED_RED) 63#define NSLU2_LED_RED_BM (1L << NSLU2_LED_RED_GPIO)
86#define NSLU2_LED_GRN_BM (1L << NSLU2_LED_GRN) 64#define NSLU2_LED_GRN_BM (1L << NSLU2_LED_GRN_GPIO)
87 65
88#define NSLU2_LED_DISK1 NSLU2_GPIO3 66#define NSLU2_LED_DISK1_GPIO 3
89#define NSLU2_LED_DISK2 NSLU2_GPIO2 67#define NSLU2_LED_DISK2_GPIO 2
90 68
91#define NSLU2_LED_DISK1_BM (1L << NSLU2_GPIO2) 69#define NSLU2_LED_DISK1_BM (1L << NSLU2_LED_DISK1_GPIO)
92#define NSLU2_LED_DISK2_BM (1L << NSLU2_GPIO3) 70#define NSLU2_LED_DISK2_BM (1L << NSLU2_LED_DISK2_GPIO)
93 71
94 72